Semiconductor device

US9373640B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9373640-B2
Application numberUS-201514804478-A
CountryUS
Kind codeB2
Filing dateJul 21, 2015
Priority dateOct 30, 2009
Publication dateJun 21, 2016
Grant dateJun 21, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An object is to provide a semiconductor device with a novel structure. The semiconductor device includes a first wiring; a second wiring; a third wiring; a fourth wiring; a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; and a second transistor having a second gate electrode, a second source electrode, and a second drain electrode. The first transistor is provided in a substrate including a semiconductor material. The second transistor includes an oxide semiconductor layer.

First claim

Opening claim text (preview).

The invention claimed is: 1. A semiconductor device comprising: a first wiring, a second wiring, a third wiring, a fourth wiring, a fifth wiring, and a plurality of storage elements connected in parallel between the first wiring and the second wiring, wherein one of the plurality of storage elements includes a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; a second transistor having a second gate electrode, a second source electrode, and a second drain electrode; and a third transistor having a third gate electrode, a third source electrode, and a third drain electrode, wherein the first transistor is provided in a substrate including a semiconductor material, wherein the second transistor includes an oxide semiconductor layer, wherein the first gate electrode and one of the second source electrode and the second drain electrode are electrically connected to each other, wherein the first wiring and the third source electrode are electrically connected to each other, wherein the third drain electrode and the first source electrode are electrically connected to each other, wherein the second wiring and the first drain electrode are electrically connected to each other, wherein the third wiring and the other of the second source electrode and the second drain electrode are electrically connected to each other, wherein the fourth wiring and the second gate electrode are electrically connected to each other, and wherein the fifth wiring and the third gate electrode are electrically connected to each other. 2. The semiconductor device according to claim 1 , wherein the first transistor includes a channel region provided in the substrate including the semiconductor material, impurity regions provided so as to sandwich the channel region, a first gate insulating layer over the channel region, the first gate electrode over the first gate insulating layer, and the first source electrode and the first drain electrode electrically connected to the impurity regions. 3. The semiconductor device according to claim 1 , wherein the second transistor includes the second gate electrode over the substrate including the semiconductor material, a second gate insulating layer over the second gate electrode, the oxide semiconductor layer over the second gate insulating layer, and the second source electrode and the second drain electrode electrically connected to the oxide semiconductor layer. 4. The semiconductor device according to claim 1 , wherein the third transistor includes a channel region provided in the substrate including the semiconductor material, impurity regions provided so as to sandwich the channel region, a third gate insulating layer over the channel region, the third gate electrode over the third gate insulating layer, and the third source electrode and the third drain electrode electrically connected to the impurity regions. 5. The semiconductor device according to claim 1 , wherein the substrate including the semiconductor material is one of a single crystal semiconductor substrate and an SOI substrate. 6. The semiconductor device according to claim 1 , wherein the semiconductor material is silicon. 7. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer comprises an In—Ga—Zn—O-based oxide semiconductor material. 8. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer includes a crystal of In 2 Ga 2 ZnO 7 . 9. The semiconductor device according to claim 1 , wherein concentration of hydrogen in the oxide semiconductor layer is 5×10 19 /cm 3 or less. 10. The semiconductor device according to claim 1 , wherein an off-state current of the second transistor is 1×10 −13 A or less. 11. The semiconductor device according to claim 1 , wherein the second wiring is parallel to the third wiring, and wherein the fourth wiring is parallel to the fifth wiring. 12. The semiconductor device according to claim 1 , wherein the second wiring is parallel to the fourth wiring, and wherein the third wiring is parallel to the fifth wiring. 13. A semiconductor device comprising: a first wiring, a second wiring, a third wiring, a fourth wiring, a fifth wiring, and a plurality of storage elements connected in parallel between the first wiring and the second wiring, wherein one of the plurality of storage elements includes a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; a second transistor having a second gate electrode, a second source electrode, and a second drain electrode; a third transistor having a third gate electrode, a third source electrode, and a third drain electrode; and a capacitor, wherein the first transistor is provided in a substrate including a semiconductor material, wherein the second transistor includes an oxide semiconductor layer, wherein the first gate electrode, one of the second source electrode and the second drain electrode, and one of electrodes of the capacitor are electrically connected to each other, wherein the first wiring, the first source electrode, and the other of the electrodes of the capacitor are electrically connected to each other, wherein the first drain electrode and the third source electrode are electrically connected to each other, wherein the second wiring and the third drain electrode are electrically connected to each other, wherein the third wiring and the other of the second source electrode and the second drain electrode are electrically connected to each other, wherein the fourth wiring and the second gate electrode are electrically connected to each other, and wherein the fifth wiring and the third gate electrode are electrically connected to each other. 14. The semiconductor device according to claim 13 , wherein the first transistor includes a channel region provided in the substrate including the semiconductor material, impurity regions provided so as to sandwich the channel region, a first gate insulating layer over the channel region, the first gate electrode over the first gate insulating layer, and the first source electrode and the first drain electrode electrically connected to the impurity regions. 15. The semiconductor device according to claim 13 , wherein the second transistor includes the second gate electrode over the substrate including the semiconductor material, a second gate insulating layer over the second gate electrode, the oxide semiconductor layer over the second gate insulating layer, and the second source electrode and the second drain electrode electrically connected to the oxide semiconductor layer. 16. The semiconductor device according to claim 13 , wherein the third transistor includes a channel region provided in the substrate including the semiconductor material, impurity regions provided so as to sandwich the channel region, a third gate insulating layer over the channel region, the third gate electrode over the third gate insulating layer, and the third source electrode and the third drain electrode electrically connected to the impurity regions. 17. The semiconductor device according to claim 13 , wherein the substrate including the semiconductor material is one of a single crystal semiconductor substrate and an SOI substrate. 18. The semiconductor device according to claim 13 , wherein the semiconductor material is silicon. 19. The semiconductor device according to claim 13 , wherein the oxide semiconductor layer comprises an In—Ga—Zn—O-based oxide semiconductor materia

Assignees

Inventors

Classifications

  • Memory devices with silicon-on-insulator cells · CPC title

  • comprising cells containing a single floating gate transistor and one or more separate select transistors · CPC title

  • Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title

  • Manufacture or treatment · CPC title

  • Three-dimensional [3D] integrated devices · CPC title

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Frequently asked questions

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What does patent US9373640B2 cover?
An object is to provide a semiconductor device with a novel structure. The semiconductor device includes a first wiring; a second wiring; a third wiring; a fourth wiring; a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; and a second transistor having a second gate electrode, a second source electrode, and a second drain electrode. The firs…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification G11C11/405. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 21 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).