Bonding method, bonding apparatus, and method for manufacturing substrate

Patent metadata

Field	Value
Publication number	US-9640507-B2
Application number	US-201414261489-A
Country	US
Kind code	B2
Filing date	Apr 25, 2014
Priority date	Aug 22, 2013
Publication date	May 2, 2017
Grant date	May 2, 2017

Abstract

A bonding method for bonding a semiconductor chip to an underlying structure includes aligning an electrical contact of a lower surface of the semiconductor chip with an electrical connection member of an upper surface of the underlying structure, the electrical contact at least partially encased by a support material. The method further includes first heating the semiconductor chip and the underlying structure, deforming the electrical contact, and curing the support material encasing the deformed electrical contact. The method still further includes second heating the semiconductor chip and the underlying structure to bond the electrical contact of the semiconductor chip to the electrical connection member of the underlying structure while maintaining the support material in a cured state.

First claim

What is claimed is:

1. A stage configured to exert pressure on upper surfaces of a plurality of semiconductor devices in a processing apparatus, the support stage comprising:
a support body including a support surface;
an elastic plate located on the support surface of the support body; and
an elastic sheet located on the support surface of the support body,
wherein the support surface includes a plurality of protrusions each having four side surfaces projecting from the support surface towards the elastic sheet, and a rectangular protrusion surface spanning the side surfaces and confronting the elastic sheet, and
the plurality of protrusions are disposed in an array and are arranged such that the protrusion surfaces respectively align with the upper surfaces of the plurality of semiconductor devices simultaneously processed by the processing apparatus.

2. The stage of claim 1 , wherein the processing apparatus is a bonding apparatus.

3. The stage of claim 1 , wherein the elastic sheet is a sheet of a rubber material.

4. The stage of claim 1 , wherein at least one of the protrusion surfaces has a plurality of indentations therein.

5. The stage of claim 1 , wherein the stage has vacuum holes open at the protrusion surfaces of the protrusions, respectively.

6. The stage of claim 5 , wherein the stage has additional vacuum holes open at the support surface between the protrusions.

7. The stage of claim 1 , wherein the support body has a plurality of indentations in the support surface thereof, and
the elastic sheet spans the indentations as spaced from respective surfaces defining the bottoms of the indentations, whereby the indentations lie beneath the back surface of the elastic sheet.

8. The stage of claim 1 , wherein the support surface is substantially planar and contiguous.

Assignees

• Han Ilyoung
• Kim Kyoungran
• Shim Donggil
• Lee Youngjoo
• Kim Byunggon
• Choi Byeongkap
• Samsung Electronics Co Ltd

Inventors

• Han Ilyoung
• Kim Kyoungran
• Shim Donggil
• Lee Youngjoo
• Kim Byunggon
• Choi Byeongkap

Classifications

• H10W90/26

  the stacked chips being of the same size without any chips being laterally offset, e.g. chip stacks having a rectangular shape · CPC title

• H10W74/15

  on active surfaces of flip-chip devices, e.g. underfills · CPC title

• H10W72/07141

  Means for applying energy, e.g. ovens or lasers · CPC title

• H10W90/00

  Package configurations · CPC title

• H10W72/0198

  batch processes · CPC title