Comparator circuit, imaging apparatus using the same, and method of controlling comparator circuit

US9635298B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9635298-B2
Application numberUS-201414517794-A
CountryUS
Kind codeB2
Filing dateOct 17, 2014
Priority dateNov 15, 2013
Publication dateApr 25, 2017
Grant dateApr 25, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An object of the present invention is to provide a comparator which has an input voltage range larger than the case where a conventional offset cancel technique is used, while reducing an offset voltage. A comparator circuit includes: a comparator having an inverting input terminal, a non-inverting input terminal and an output terminal; a first switch having one terminal connected to the inverting input terminal and having the other terminal connected to the output terminal; a first capacitor which has one end connected with the inverting input terminal; a first signal input terminal which is another end of the first capacitor; and a second signal input terminal which selectively inputs either one of a fixed voltage and a comparing signal into the non-inverting input terminal.

First claim

Opening claim text (preview).

What is claimed is: 1. An imaging apparatus comprising: a plurality of pixels arranged in two dimensions, to output a pixel signal based on an incident light; a readout circuit configured to be input the pixel signal, and to output the pixel signal processed; a reference signal generating unit configured to output a ramp signal; and an analog-digital converter, wherein the analog-digital converter is configured to convert the pixel signal into a digital signal, the digital signal having a value corresponding to an amplitude of the analog signal, and wherein the analog-digital converter comprises: a comparator having a first input terminal, a second input terminal and an output terminal; a first switch having terminals, one terminal of the terminals connected to the first input terminal, the other terminal of the terminals connected to the output terminal, and short-circuiting between the output terminal and the first input terminal at a conducting state; a first capacitor having terminals, one terminal of the terminals of the first capacitor receiving the pixel signal, the other terminal of the terminals of the first capacitor being connected to the first input terminal and the one terminal of the first switch; a second capacitor having terminals, one terminal of the terminals of the second capacitor being connected to the second input terminal, the other terminal of the terminals of the second capacitor receiving the ramp signal; and a second switch having terminals, one terminal of the terminals of the second switch being connected to the one terminal of the second capacitor and the second input terminal, the other terminal of the terminals of the second switch receiving a fixed voltage, wherein the analog-digital converter inputs signals output from the readout circuit through the first capacitor, as the pixel signal, and inputs the ramp signal from the reference signal generating unit through the second capacitor. 2. The imaging apparatus according to claim 1 , wherein the readout circuit further comprises an amplifier configured to amplify or non-amplify selectively the voltage of the pixel signal. 3. The imaging apparatus according to claim 1 , wherein the analog-digital converter performs a circuit operation in a first state such that the first switch is set at a non-conductive state after being set at the conducting state, to hold an output voltage of the comparator by the first capacitor, and a second state such that the first switch is set at a non-conducting state, and the other terminal of the second switch receives the ramp signal. 4. The imaging apparatus according to claim, wherein the fixed voltage and the ramp signal are supplied through a common wiring connected to the other terminal of the second switch. 5. The imaging apparatus according to claim 1 , wherein, in the first state, the second switch is further set at a conducting state, to input the fixed voltage to the one terminal of the second capacitor and the second input terminal, and, in the second state, the second switch is further set at a non-conducting state after the first state, to hold a voltage difference between the one terminal and the other terminal of the second capacitor. 6. An imaging system comprising: an imaging apparatus; and an image processing unit, wherein the imaging apparatus comprises: a plurality of pixels arranged in two dimensions, to output a pixel signal based on an incident light; a readout circuit configured to be input the pixel signal, and to output the pixel signal processed; a reference signal generating unit configured to output a ramp signal; and an analog-digital converter, wherein the analog-digital converter is configured to convert the pixel signal into a digital signal, the digital signal having a value corresponding to an amplitude of the pixel signal, and wherein the analog-digital converter comprises: a comparator having a first input terminal, a second input terminal and an output terminal; a first switch having terminals, one terminal of the terminals connected to the first input terminal, the other terminal of the terminals connected to the output terminal, and short-circuiting between the output terminal and the first input terminal at a conducting state; a first capacitor having terminals, one terminal of the terminals of the first capacitor receiving the pixel signal, the other terminal of the terminals of the first capacitor being connected to the first input terminal and the one terminal of the first switch; a second capacitor having terminals, one terminal of the terminals of the second capacitor being connected to the second input terminal, the other terminal of the terminals of the second capacitor receiving the ramp signal; and a second switch having terminals, one terminal of the terminals of the second switch being connected to the one terminal of the second capacitor and the second input terminal, the other terminal of the terminals of the second switch receiving a fixed voltage, and wherein the analog-digital converter is input signals output from the readout circuit through the first capacitor, as the pixel signal, and is input the ramp signal from the reference signal generating unit through the second capacitor. 7. A controlling method of an imaging apparatus, the imaging apparatus comprising: a plurality of pixels arranged in two dimensions, to output a pixel signal based on an incident light; a readout circuit configured to be input the pixel signal, and to output the pixel signal processed; a reference signal generating unit configured to output a ramp signal; and an analog-digital converter, wherein the analog-digital converter is configured to convert the pixel signal into a digital signal, the digital signal having a value corresponding to an amplitude of the pixel signal, and wherein the analog-digital converter comprising: a comparator having a first input terminal, a second input terminal and an output terminal; a first switch having terminals, one terminal of the terminals connected to the first input terminal, the other terminal of the terminals connected to the output terminal, and short-circuiting between the output terminal and the first input terminal at a conducting state; a first capacitor having terminals, one terminal of the terminals of the first capacitor receiving the pixel signal, the other terminal of the terminals of the first capacitor being connected to the first input terminal and the one terminal of the first switch; and a second capacitor having terminals, one terminal of the terminals of the second capacitor being connected to the second input terminal, the other terminal of the second capacitor receiving the ramp signal; wherein the method comprising: turning ON the first switch during a period of resetting the second capacitor. 8. The controlling method according to claim 7 , the comparator further comprising; a second switch having terminals, one terminal connected to the second input terminal and the one terminal of the second capacitor, the other terminal of the terminals connected to the other terminal of the second capacitor, and turning On to short-circuit between the non-inverting terminal and the one terminal of the second capacitor, and the other terminal of the second capacitor; wherein the resetting the second capacitor is performed by turning ON the second switch.

Assignees

Inventors

Classifications

  • H03K5/249Primary

    using clock signals · CPC title

  • Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components · CPC title

  • Input signal compared with linear ramp · CPC title

  • Clamping, i.e. adjusting the DC level of the input signal to a predetermined value · CPC title

  • Discriminating pulses (measuring characteristics of individual pulses G01R29/02; separation of synchronising signals in television systems H04N5/08) · CPC title

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What does patent US9635298B2 cover?
An object of the present invention is to provide a comparator which has an input voltage range larger than the case where a conventional offset cancel technique is used, while reducing an offset voltage. A comparator circuit includes: a comparator having an inverting input terminal, a non-inverting input terminal and an output terminal; a first switch having one terminal connected to the invert…
Who is the assignee on this patent?
Canon Kk
What technology area does this patent fall under?
Primary CPC classification H03K5/249. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 25 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).