Page resolution status reporting

US9632901B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9632901-B2
Application numberUS-201514846870-A
CountryUS
Kind codeB2
Filing dateSep 7, 2015
Priority dateSep 11, 2014
Publication dateApr 25, 2017
Grant dateApr 25, 2017

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A method for data transfer includes receiving in a data transfer operation data to be written by a peripheral device to a specified virtual address in a random access memory (RAM) of a host computer. Upon receiving the data, it is detected that a page that contains the specified virtual address is marked as not present in a page table of the host computer. The peripheral device receives a notification that the page is not present and an estimate of a length of time that will be required to make the page available and selects a mode for handling of the data transfer operation depending upon the estimate.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for data transfer, comprising: receiving in a data transfer operation data to be written by a peripheral device to a specified virtual address in a random access memory (RAM) of a host computer; detecting, upon receiving the data, that a page that contains the specified virtual address is marked as not present in a page table of the host computer; receiving in the peripheral device a notification that the page is not present and an estimate of a length of time that will be required to make the page available; selecting a mode for handling of the data transfer operation depending upon the estimate; and completing the data transfer operation in accordance with the selected mode. 2. The method according to claim 1 , wherein detecting that the page is marked as not present comprises looking up a page entry in a page table, and finding the page entry to be invalid. 3. The method according to claim 2 , wherein receiving the notification comprises reading the estimate from the page entry, wherein the estimate is written to the page table by an operating system of the host computer. 4. The method according to claim 1 , wherein receiving the notification comprises submitting a page request from the peripheral device to an operating system of the host computer, and receiving a response from the operating system providing the estimate. 5. The method according to claim 1 , wherein receiving the estimate comprises receiving an indication of a location of the page that is not present, and estimating the length of time that will be required to swap the page back into the RAM depending upon the location. 6. The method according to claim 5 , wherein the location is selected from a list of locations consisting of a page cache in the RAM, a quick-swap device, and a disk. 7. The method according to claim 1 , wherein completing the data transfer operation comprises scheduling a time for completion of the data transfer operation after the estimated length of time has elapsed, and suspending the data transfer operation until the scheduled time. 8. The method according to claim 1 , wherein selecting the mode comprises, when the estimated length of time is less than a predefined limit, buffering the data in a local memory of the peripheral device until the page has been swapped back into the RAM. 9. The method according to claim 1 , wherein selecting the mode comprises, when the estimated length of time is greater than a predefined limit, stalling the data transfer operation for a delay period selected responsively to the estimate. 10. The method according to claim 9 , wherein the data transfer operation comprises reception of data transmitted over a network to the peripheral device, and wherein stalling the data transfer operation comprises sending a control message over the network to a source of the data so as to inhibit further transmission during the delay period. 11. The method according to claim 1 , wherein receiving the estimate of the length of time comprises reading a value from a global register and applying the value in making the estimate. 12. The method according to claim 11 , wherein the value read from the global register is indicative of a memory pressure experienced by an operating system of the host computer. 13. The method according to claim 11 , wherein the global register resides in the RAM of the host computer. 14. The method according to claim 11 , wherein reading the value from the global register comprises selecting the global register for use in making the estimate according to a page table entry associated with the specified virtual address. 15. The method according to claim 11 , wherein making the estimate comprises adding the value read from the global register to a latency estimation provided in a page table entry associated with the specified virtual address. 16. A method for data transfer, comprising: receiving in a host computer page requests from a peripheral device coupled to the host computer with respect to specified pages of virtual memory in a random access memory (RAM) of the host computer; providing notifications from the host computer to the peripheral device with respect to whether the specified pages are present in the RAM; and for the pages that are not present, providing from the host computer to the peripheral device estimates of lengths of time that will be required to swap the pages back into the RAM. 17. The method according to claim 16 , wherein providing the notifications comprises invalidating page entries corresponding to the pages that are not present in a page table maintained by the host computer, and wherein providing the estimates comprises writing indications in the invalidated page entries of the lengths of time required to swap the corresponding pages back into the RAM. 18. The method according to claim 16 , wherein providing the estimates comprises sending page resolution notifications from the host processor to the peripheral device. 19. The method according to claim 16 , wherein providing the estimates comprises providing indications of locations of the swapped-out pages, wherein the lengths of time that will be required to swap the pages back into the RAM depend upon the location. 20. The method according to claim 19 , wherein the locations are selected from a list of possible locations consisting of a page cache in the RAM, a quick-swap device, and a disk. 21. Data transfer apparatus, comprising: a host interface for connection to a host processor having a random access memory (RAM) and one or more swap devices; a network interface, which is configured to receive data sent over a network and destined for a specified virtual address in the RAM; and processing circuitry, which is coupled between the host interface and the network interface and is configured to detect that a page that contains the specified virtual address is marked as not present in a page table maintained by the host processor, to receive an estimate of a length of time that will be required to swap the page back into the RAM, to select a mode for handling of the data depending upon the estimate, and to handle the data in accordance with the selected mode. 22. The apparatus according to claim 21 , wherein the processing circuitry is configured to detect that the page is marked as not present by looking up a page entry in a page table, and finding the page entry to be invalid. 23. The apparatus according to claim 22 , wherein the processing circuitry is configured to read from the page entry the estimate of the length of time that will be required to swap the page back into the RAM, wherein the estimate is written to the page table by an operating system of the host computer. 24. The apparatus according to claim 21 , wherein the processing circuitry is configured to submit a page request to an operating system of the host computer, and to receive a response from the operating system providing the estimate of the length of time that will be required to swap the page back into the RAM. 25. The apparatus according to claim 21 , wherein the estimate comprises an indication of a location of the swapped-out page, and wherein the processing circuitry is configured to estimate the length of time that will be required to swap the page back into the RAM depending upon the location. 26. The apparatus according to claim 25 , wherein the location is selected from a

Assignees

Inventors

Classifications

  • using page tables, e.g. page table structures · CPC title

  • Virtual address space management · CPC title

  • Monitoring arrangements determined by the means or processing involved in reporting the monitored data (error or fault reporting or logging G06F11/0766) · CPC title

  • for adaptation of a particular data processing system to different peripheral devices · CPC title

  • Access to shared memory · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9632901B2 cover?
A method for data transfer includes receiving in a data transfer operation data to be written by a peripheral device to a specified virtual address in a random access memory (RAM) of a host computer. Upon receiving the data, it is detected that a page that contains the specified virtual address is marked as not present in a page table of the host computer. The peripheral device receives a notif…
Who is the assignee on this patent?
Mellanox Technologies Ltd, Mellanox Technologies Ltd
What technology area does this patent fall under?
Primary CPC classification G06F12/1009. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 25 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).