ZnO-based system on glass (SOG) for advanced displays

Patent metadata

Field	Value
Publication number	US-9627439-B2
Application number	US-201314399367-A
Country	US
Kind code	B2
Filing date	May 8, 2013
Priority date	Jul 13, 2011
Publication date	Apr 18, 2017
Grant date	Apr 18, 2017

Abstract

A ZnO based display pixel structure that includes system-on-glass (SOG) substrates with embedded non-volatile resistive random access memory iNV-RRAM) is provided. Such pixels feature high frame rates and low power consumption. The entire SOG is based on ZnO devices. Different devices including TFT, TCO, RRAM, inverters, and shift registers are obtained through doping of different elements into selected ZnO active regions. This reduces the cost to package control circuitry onto a backplane of a display system, resulting in a low cost, light weight and uUra-thin display.

First claim

We claim:

1. A system on glass (SOG) pixel circuit comprising:
a first thin film transistor (TFT) comprising Mg x Zn 1-x O (0<x<6%) as a channel layer, the first TFT formed directly on an electronic visual display substrate, wherein the amount of Mg is effective to provide said channel layer with a decrease in oxygen vacancy to improve thermal stability and negative bias stress stability; and
a ZnO based non-volatile memory (NVM) resistive switching device, wherein the TFT and NVM are integrated to form a display pixel.

2. The circuit of claim 1 wherein the NVM device is formed directly on the electronic visual display substrate.

3. The circuit of claim 1 further comprising a second TFT, wherein the first TFT and the second TFT form one of an E-E inverter, a D-E inverter, a pseudo-complementary metal-oxide-semiconductor (CMOS) logic gate, and a pseudo-CMOS inverter.

4. The circuit of claim 3 , wherein the second TFT is formed directly on the electronic visual display substrate.

5. The circuit of claim 3 , wherein the first TFT and the second TFT form a D-E inverter and are each selectively doped with different elements.

6. The circuit of claim 5 , wherein the second TFT is doped with a Group III element.

7. The circuit of claim 5 , wherein the electronic visual display substrate is glass and circuits with different logical functions are integrated directly on glass and packaged as a system on glass (SOG).

8. The circuit of claim 1 , wherein the electronic visual display substrate is a solid state insulating substrate.

9. The circuit of claim 1 , wherein the electronic visual display substrate is a flexible substrate.

10. The circuit of claim 1 , wherein the resistive switching device comprises a transition metal doped ZnO.

11. The circuit of claim 10 , wherein the transition metal is iron.

12. The circuit of claim 1 , wherein the circuit is implemented into the advanced displays that require high frame rates, low power and light weight.

Assignees

• Univ Rutgers

Inventors

• Lu Yicheng
• Ku Chieh-Jen

Classifications

• H01L27/2436 Primary

  Electricity · mapped topic

• H01L45/146

  Electricity · mapped topic

• H01L29/7869

  Electricity · mapped topic

• H01L45/08

  Electricity · mapped topic

• H10D30/6755 Primary

  Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title