Morphology control of ultra-thin MeOx layer

US9178140B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9178140-B2
Application numberUS-201514624209-A
CountryUS
Kind codeB2
Filing dateFeb 17, 2015
Priority dateDec 21, 2012
Publication dateNov 3, 2015
Grant dateNov 3, 2015

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Abstract

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A nonvolatile memory device contains a resistive switching memory element with improved device switching performance and life and methods for forming the same. The nonvolatile memory device has a first layer on a substrate, a resistive switching layer on the first layer, and a second layer. The resistive switching layer is disposed between the first layer and the second layer and the resistive switching layer comprises a material having the same morphology as the top surface of the first layer. A method of forming a nonvolatile memory element in a ReRAM device includes forming a resistive switching layer on a first layer and forming a second layer, so that the resistive switching layer is disposed between the first layer and the second layer. The resistive switching layer comprises a material formed with the same morphology as the top surface of the first layer.

First claim

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The invention claimed is: 1. A device comprising: a first layer operable as a first electrode; a second layer disposed over the first layer, wherein the second layer comprises one of hafnium oxynitride, zirconium oxynitride, aluminum oxynitride, tantalum oxynitride, hafnium nitride, zirconium nitride, silicon nitride, aluminum nitride, titanium nitride, vanadium nitride, niobium nitride, or tungsten nitride, wherein the second layer directly interfaces the first layer, wher…

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What does patent US9178140B2 cover?
A nonvolatile memory device contains a resistive switching memory element with improved device switching performance and life and methods for forming the same. The nonvolatile memory device has a first layer on a substrate, a resistive switching layer on the first layer, and a second layer. The resistive switching layer is disposed between the first layer and the second layer and the resistive …
Who is the assignee on this patent?
Intermolecular Inc, Toshiba Kk, Sandisk 3D Llc, and 1 more
What technology area does this patent fall under?
Primary CPC classification H10N70/25. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).