PECVD films for EUV lithography

Patent metadata

Field	Value
Publication number	US-9618846-B2
Application number	US-201615053987-A
Country	US
Kind code	B2
Filing date	Feb 25, 2016
Priority date	Feb 25, 2013
Publication date	Apr 11, 2017
Grant date	Apr 11, 2017

Abstract

Provided herein are multi-layer stacks for use in extreme ultraviolet lithography tailored to achieve optimum etch contrast to shrink features and smooth the edges of features while enabling use of an optical leveling sensor with little or reduced error. The multi-layer stacks may include an atomically smooth layer with an average local roughness of less than a monolayer, and one or more underlayers, which may be between a target layer to be patterned and a photoresist. Also provided are methods of depositing multi-layer stacks for use in extreme ultraviolet lithography.

First claim

What is claimed is:

1. A multi-layer stack on a semiconductor substrate for extreme ultraviolet lithography comprising:
an atomically smooth layer with an average local roughness of less than a monolayer, and one or more underlayers,
wherein the one or more underlayers have high etch contrast to layers adjacent to them, and
wherein one of the one or more underlayers comprises amorphous silicon having a hydrogen content less than about 5%.

2. The multi-layer stack of claim 1 , further comprising:
a photoresist, and
a target layer,
wherein the atomically smooth layer and the one or more underlayers are between the photoresist and the target layer, and
wherein the atomically smooth layer is adjacent to the photoresist.

3. The multi-layer stack of claim 2 , wherein the photoresist is between about 100 Å and 600 Å thick.

4. The multi-layer stack of claim 1 , wherein the thickness of the atomically smooth layer is between about 30 Å and about 60 Å.

5. The multi-layer stack of claim 1 , wherein the atomically smooth layer comprises an oxide.

6. The multi-layer stack of claim 1 , wherein the average local roughness of the atomically smooth layer is less than about 2 Å.

7. The multi-layer stack of claim 1 , wherein another one of the one or more underlayers is a hardmask adjacent to a target layer.

8. The multi-layer stack of claim 7 , wherein the hardmask comprises amorphous carbon having a hydrogen content less than about 20%.

9. The multi-layer stack of claim 8 , wherein the amorphous carbon hardmask has a thickness between about 400 Å and about 900 Å.

10. The multi-layer stack of claim 8 , wherein the amorphous carbon hardmask has a modulus to stress ratio of about 1:1.

11. The multi-layer stack of claim 1 , wherein at least one of the one or more underlayers absorbs a leveling beam struck on the substrate to measure wafer levelness.

Assignees

• Lam Res Corp

Inventors

• Shamma Nader
• Mountsier Thomas
• Schlosser Donald

Classifications

• H10P76/4088

  Processes for improving the resolution of the masks · CPC title

• H10P76/4085

  characterised by the processes involved to create the masks · CPC title

• H10P14/6336

  in the presence of a plasma [PECVD] · CPC title

• H10P76/2043 Primary

  using an anti-reflective coating · CPC title

• H10P76/2041

  Photolithographic processes · CPC title