Voltage-to-current converter

Patent metadata

Field	Value
Publication number	US-9608586-B2
Application number	US-201514639553-A
Country	US
Kind code	B2
Filing date	Mar 5, 2015
Priority date	Sep 25, 2014
Publication date	Mar 28, 2017
Grant date	Mar 28, 2017

Abstract

A converter including: an amplifier having first and second input terminals and an output terminal, the first input terminal configured to receive a reference voltage; an array of resistors configured to generate a tuning voltage; and a first plurality of switches coupled to the second input terminal of the amplifier and the array of resistors, the first plurality of switches configured to adjust a gain of the amplifier by selecting at least one resistor in the array of resistors to connect to the second input terminal of the amplifier.

First claim

The invention claimed is:

1. A converter comprising:
an amplifier having first and second input terminals and an output terminal, the first input terminal configured to receive a reference voltage, wherein the first input terminal of the amplifier is a positive input terminal and the second input terminal is a negative input terminal;
an array of resistors configured to generate a tuning voltage;
a first plurality of switches coupled to the second input terminal of the amplifier and the array of resistors, the first plurality of switches configured to adjust a gain of the amplifier by selecting at least one resistor in the array of resistors to connect to the second input terminal of the amplifier;
a tuning current digital-to-analog converter configured to generate an output current; and
a comparator configured to receive and compare the tuning voltage and the output current.

2. The converter of claim 1 , further comprising
a first transistor having a gate terminal, a source terminal, and a drain terminal,
wherein the output terminal of the amplifier is coupled to the gate terminal of the transistor.

3. The converter of claim 2 , wherein the first transistor is a p-type metal-oxide-semiconductor field-effect (PMOS) transistor.

4. The converter of claim 3 , further comprising
a second plurality of switches coupled to the first plurality of switches and the drain terminal of the PMOS transistor.

5. The converter of claim 4 , wherein the second plurality of switches are configured to short at least one non-selected resistor in the array of resistors to the drain terminal of the first transistor.

6. The converter of claim 4 , wherein the first plurality of switches and the second plurality of switches are operated in synchronization.

7. The converter of claim 4 , wherein the first plurality of switches and the second plurality of switches are configured to program the array of resistors to provide a second voltage at the second input terminal of the amplifier.

8. The converter of claim 7 , wherein the second voltage at the second input terminal of the amplifier enables the amplifier to regulate current flowing through the first transistor.

9. The converter of claim 1 , wherein a connection of the at least one selected resistor in the array of resistors to the second input terminal of the amplifier is configured as an open terminal to minimize current flow from or into the first plurality of switches.

10. An apparatus comprising:
means for comparing first and second signals received at first and second input terminals, respectively, wherein the first signal is a reference voltage;
means for selecting and coupling at least one resistor in an array of resistors to the second input terminal of the means for comparing;
means for sourcing current having a gate terminal, a source terminal, and a drain terminal, wherein the gate terminal of the means for sourcing current is coupled to the means for comparing; and
means for shorting at least one non-selected resistor of the array of resistors to the drain terminal of the means for sourcing current.

11. The apparatus of claim 10 , wherein the means for selecting and coupling and the means for shorting are operated in synchronization.

12. The apparatus of claim 10 , wherein the means for selecting and coupling and the means for shorting are configured to program the array of resistors to provide a second voltage at the second input terminal of the means for comparing.

13. The apparatus of claim 12 , wherein the second voltage at the second input terminal of the means for comparing enables the means for comparing to regulate current flowing through the means for sourcing current.

14. A method, comprising:
comparing first and second signals received at first and second input terminals, respectively, of an amplifier, wherein the first signal is a reference voltage;
selecting and coupling at least one resistor in an array of resistors to the second input terminal of the amplifier;
sourcing current using a transistor having a gate terminal, a source terminal, and a drain terminal, wherein the gate terminal of the transistor is coupled to an output terminal of the amplifier; and
shorting at least one non-selected resistor of the array of resistors to the drain terminal of the transistor using a plurality of short switches.

15. A voltage-to-current converter comprising:
an amplifier having positive and negative input terminals and an output terminal, the positive input terminal configured to receive a reference voltage;
first, second, third, fourth, and fifth resistors configured to generate a tuning voltage;
a first switch coupled to the negative input terminal of the amplifier and the first resistor, the first resistor coupled to the second resistor which is coupled to the ground voltage, wherein the tuning voltage is generated at a coupling node between the first resistor and the second resistor;
a second switch coupled to the negative input terminal of the amplifier and the third resistor, which is coupled to the first resistor;
a third switch coupled to the negative input terminal of the amplifier and the fourth resistor, which is coupled to the third resistor; and
a fourth switch coupled to the negative input terminal of the amplifier and the fifth resistor, which is coupled to the fourth resistor.

16. The voltage-to-current converter of claim 15 , further comprising
a first transistor having a gate terminal, a source terminal, and a drain terminal,
wherein the output terminal of the amplifier is coupled to the gate terminal of the transistor.

17. The voltage-to-current converter of claim 16 , further comprising:
a fifth switch coupled to the first switch and the drain terminal of the first transistor;
a sixth switch coupled to the second switch and the drain terminal of the first transistor; and
a seventh switch coupled to the third switch and the drain terminal of the first transistor, wherein the fourth switch also couples to the drain terminal of the first transistor.

Assignees

• Qualcomm Inc

Inventors

• Du Li
• Lee Sang Min
• Seo Dongwon

Classifications

• G05F1/561 Primary

  Voltage to current converters (amplifiers H03F) · CPC title

• H03K5/24

  the characteristic being amplitude · CPC title

• H03F2200/21

  Bias resistors are added at the input of an amplifier · CPC title

• H03F1/0233

  by using a signal derived from the output signal, e.g. bootstrapping the voltage supply · CPC title

• H03F2200/252

  Multiple switches coupled in the input circuit of an amplifier are controlled by a circuit, e.g. feedback circuitry being controlling the switch · CPC title