Semiconductor device

US9608124B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9608124-B2
Application numberUS-201514694291-A
CountryUS
Kind codeB2
Filing dateApr 23, 2015
Priority dateJan 20, 2012
Publication dateMar 28, 2017
Grant dateMar 28, 2017

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Provided is a transistor which has favorable transistor characteristics and includes an oxide semiconductor, and a highly reliable semiconductor device which includes the transistor including the oxide semiconductor. In the semiconductor device including the transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode are stacked in this order, a sidewall insulating film is formed along side surfaces and a top surface of the gate electrode, and the oxide semiconductor film is subjected to etching treatment so as to have a cross shape having different lengths in the channel length direction or to have a larger length than a source electrode and a drain electrode in the channel width direction. Further, the source electrode and the drain electrode are formed in contact with the oxide semiconductor film.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising: an oxide semiconductor film comprising: a channel formation region; a first region protruding from the channel formation region in a first channel width direction; and a second region protruding from the channel formation region in a second channel width direction opposite to the first channel width direction; a source electrode in contact with a first side surface of the channel formation region; a drain electrode in contact with a second side surface of the channel formation region; a gate electrode overlapping with the first region, the second region, and the channel formation region; and an insulating film between the oxide semiconductor film and the gate electrode, wherein the oxide semiconductor film has a cross shape, wherein the channel formation region is provided between the first region and the second region, and wherein the channel formation region is provided between the source electrode and the drain electrode in a channel length direction. 2. The semiconductor device according to claim 1 , wherein the gate electrode is over the oxide semiconductor film. 3. The semiconductor device according to claim 1 , wherein the oxide semiconductor film comprises indium, zinc, and a metal element other than indium and zinc. 4. The semiconductor device according to claim 3 , wherein the metal element is gallium. 5. The semiconductor device according to claim 1 , wherein the insulating film comprises: a first insulating film comprising oxygen; and a second insulating film comprising nitrogen between the first insulating film and the gate electrode. 6. The semiconductor device according to claim 1 , wherein a concentration of copper in the oxide semiconductor film is lower than or equal to 1×10 18 atoms/cm 3 . 7. The semiconductor device according to claim 1 , wherein a concentration of aluminum in the oxide semiconductor film is lower than or equal to 1×10 18 atoms/cm 3 . 8. The semiconductor device according to claim 1 , wherein a concentration of chlorine in the oxide semiconductor film is lower than or equal to 2×10 18 atoms/cm 3 . 9. A semiconductor device comprising: an oxide semiconductor film comprising: a channel formation region; and first and second regions sandwiching the channel formation region in a channel width direction; source and drain electrodes in contact with side surfaces of the channel formation region; a gate electrode overlapping with the first and second regions and the channel formation region; and an insulating film between the oxide semiconductor film and the gate electrode, wherein the oxide semiconductor film has a cross shape, and wherein the channel formation region is between the source and drain electrodes in a channel length direction. 10. The semiconductor device according to claim 9 , wherein the gate electrode is over the oxide semiconductor film. 11. The semiconductor device according to claim 9 , wherein the oxide semiconductor film comprises indium, zinc, and a metal element other than indium and zinc. 12. The semiconductor device according to claim 11 , wherein the metal element is gallium. 13. The semiconductor device according to claim 9 , wherein the insulating film comprises: a first insulating film comprising oxygen; and a second insulating film comprising nitrogen between the first insulating film and the gate electrode. 14. The semiconductor device according to claim 9 , wherein a concentration of copper in the oxide semiconductor film is lower than or equal to 1×10 18 atoms/cm 3 . 15. The semiconductor device according to claim 9 , wherein a concentration of aluminum in the oxide semiconductor film is lower than or equal to 1×10 18 atoms/cm 3 . 16. The semiconductor device according to claim 9 , wherein a concentration of chlorine in the oxide semiconductor film is lower than or equal to 2×10 18 atoms/cm 3 .

Assignees

Inventors

Classifications

  • characterised by the electrodes · CPC title

  • wherein the TFTs are in active matrices · CPC title

  • Conductor-insulator-semiconductor electrodes · CPC title

  • characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes · CPC title

  • characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

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What does patent US9608124B2 cover?
Provided is a transistor which has favorable transistor characteristics and includes an oxide semiconductor, and a highly reliable semiconductor device which includes the transistor including the oxide semiconductor. In the semiconductor device including the transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode are stacked in this order, a sidewall insula…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H10D30/6755. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 28 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).