Semiconductor device and method for manufacturing the same

US9378980B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9378980-B2
Application numberUS-201514964898-A
CountryUS
Kind codeB2
Filing dateDec 10, 2015
Priority dateDec 18, 2009
Publication dateJun 28, 2016
Grant dateJun 28, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A transistor including an oxide semiconductor, which has good on-state characteristics, and a high-performance semiconductor device including a transistor capable of high-speed response and high-speed operation. In the transistor including an oxide semiconductor, oxygen-defect-inducing factors are introduced (added) into an oxide semiconductor layer, whereby the resistance of a source and drain regions are selectively reduced. Oxygen-defect-inducing factors are introduced into the oxide semiconductor layer, whereby oxygen defects serving as donors can be effectively formed in the oxide semiconductor layer. The introduced oxygen-defect-inducing factors are one or more selected from titanium, tungsten, and molybdenum, and are introduced by an ion implantation method.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for manufacturing a semiconductor device, comprising the steps of: forming an oxide semiconductor layer; forming a gate insulating layer over the oxide semiconductor layer; forming a gate electrode layer over the gate insulating layer; and forming a channel formation region, a source region, and a drain region in the oxide semiconductor layer by introducing elements into the oxide semiconductor layer for selectively forming oxygen defects in the source region and the drain region, wherein a concentration of the elements of the source region or the drain region is higher than that of the channel formation region, and wherein the elements are one or more selected from the group consisting of titanium, tungsten, and molybdenum. 2. The method for manufacturing a semiconductor device, according to claim 1 , further comprising the steps of: forming an insulating layer over the gate electrode layer; and forming a source electrode layer and a drain electrode layer over the insulating layer. 3. The method for manufacturing a semiconductor device, according to claim 1 , wherein the channel formation region includes the elements in the step of introducing the elements. 4. The method for manufacturing a semiconductor device, according to claim 1 , wherein the elements are introduced by an ion implantation method. 5. A method for manufacturing a semiconductor device, comprising the steps of: forming an oxide semiconductor layer; forming a gate insulating layer over the oxide semiconductor layer; forming a gate electrode layer over the gate insulating layer; forming an insulating layer over the gate electrode layer; and forming a first region functioning as a source and drain regions, a second region having higher resistance than the first region, and a channel formation region by introducing elements into the oxide semiconductor layer for selectively forming oxygen defects in the first region and the second region; wherein a concentration of the elements of the first region is higher than that of the channel formation region, and wherein the elements are one or more selected from the group consisting of titanium, tungsten, and molybdenum. 6. The method for manufacturing a semiconductor device, according to claim 5 , further comprising the step of: forming a source electrode layer and a drain electrode layer over the insulating layer. 7. The method for manufacturing a semiconductor device, according to claim 5 , wherein the channel formation region includes the elements in the step of introducing the elements. 8. The method for manufacturing a semiconductor device, according to claim 5 , wherein the elements are introduced by an ion implantation method. 9. A method for manufacturing a semiconductor device, comprising the steps of: forming an oxide semiconductor layer; forming a gate insulating layer over the oxide semiconductor layer; forming a gate electrode layer over the gate insulating layer; introducing first elements into a first part of the oxide semiconductor layer by using the gate electrode layer as a mask; forming an insulating layer over the gate electrode layer; introducing second elements into a second part of the oxide semiconductor layer by using the gate electrode layer and a part of the insulating layer as a mask; wherein a first region functioning as source and drain regions, a second region having higher resistance than the first region, and a channel formation region are formed by the steps of introducing the first elements and the second elements, wherein the second region is between the first region and the channel formation region, wherein a concentration of the sum of the first elements and the second elements of the first region is higher than that of the channel formation region, and wherein the first elements and the second elements are one or more selected from the group consisting of titanium, tungsten, and molybdenum. 10. The method for manufacturing a semiconductor device, according to claim 9 , further comprising the step of: forming a source electrode layer and a drain electrode layer over the insulating layer. 11. The method for manufacturing a semiconductor device, according to claim 9 , wherein the channel formation region includes the first elements in the step of introducing the first elements. 12. The method for manufacturing a semiconductor device, according to claim 9 , wherein the first elements and the second elements are introduced by an ion implantation method.

Assignees

Inventors

Classifications

  • characterised by the semiconductor materials · CPC title

  • using masks · CPC title

  • being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424) · CPC title

  • Oxides · CPC title

  • using physical deposition, e.g. vacuum deposition or sputtering · CPC title

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Frequently asked questions

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What does patent US9378980B2 cover?
A transistor including an oxide semiconductor, which has good on-state characteristics, and a high-performance semiconductor device including a transistor capable of high-speed response and high-speed operation. In the transistor including an oxide semiconductor, oxygen-defect-inducing factors are introduced (added) into an oxide semiconductor layer, whereby the resistance of a source and drain…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H10D30/6755. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 28 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).