Hetero-switching layer in a RRAM device and method

US9601692B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9601692-B1
Application numberUS-201514611022-A
CountryUS
Kind codeB1
Filing dateJan 30, 2015
Priority dateJul 13, 2010
Publication dateMar 21, 2017
Grant dateMar 21, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device includes first electrodes disposed upon a substrate, wherein each first electrode comprises a metal containing material, switching devices disposed overlying the first electrodes, wherein each switching device comprises a first switching material, a second switching material, and an active metal, wherein the first switching material is disposed overlying and contacting the first electrodes, wherein the second switching material is disposed overlying and contacting the first switching material, wherein the active metal is disposed overlying and contacting the second switching material, wherein the first switching material is characterized by a first switching voltage, wherein the second switching material is characterized by a second switching voltage greater than the first switching voltage; and second electrodes disposed above the switching devices, comprising the metal material, and wherein each of the second electrodes is electrically coupled to the active metal material of the switching devices.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising: a substrate; a first plurality of electrodes disposed upon the substrate, wherein each electrode from the first plurality of electrodes comprises a metal containing material; a plurality of resistive switching devices disposed overlying the plurality of first electrodes, wherein each resistive switching device from the plurality of resistive switching devices comprises a first resistive switching material, a second resistive switching material, and at least an active metal material, wherein the first resistive switching material is disposed overlying the first electrode, wherein the second resistive switching material is disposed overlying and contacting the first resistive switching material, wherein the active metal material is disposed overlying the second resistive switching material, wherein the first resistive switching material is characterized by a first switching voltage having a first amplitude, wherein the second resistive switching material is characterized by a second switching voltage having a second amplitude, and wherein the first amplitude is less than the second amplitude; a second plurality of electrodes disposed above the plurality of resistive switching devices, wherein each electrode from the second plurality of electrodes comprises the metal material, and wherein each electrode from the second plurality of electrodes is disposed overlying and electrically coupled to the active metal material of the resistive switching devices from the plurality of resistive switching devices. 2. The device of claim 1 wherein the metal containing material in each electrode from the first plurality of electrodes comprises particles of metal selected from a group consisting of: copper, tungsten, aluminum; wherein each electrode from the first plurality of electrodes also comprises a barrier material selected from a group consisting of titanium, titanium nitride, tungsten, tungsten nitride, tantalum, tantalum nitride, and titanium tungsten; and wherein the first resistive switching material is disposed overlying and contacting the barrier material. 3. The device of claim 1 wherein the metal containing material in each electrode from the plurality of electrodes comprises particles of copper metal; and wherein each electrode from the first plurality of electrodes includes tantalum nitride. 4. The device of claim 1 wherein the first resistive switching material is configured to maintain a high resistance state until after the first switching voltage is applied, after which the first resistive switching material is configured to enter a low resistance state. 5. The device of claim 1 wherein the first resistive switching material is characterized by the first switching voltage having the first amplitudes within a range of about 0.1 volts to about 1 volt. 6. The device of claim 1 wherein the first resistive switching material comprises a solid electrolyte. 7. The device of claim 1 wherein the first resistive switching material is selected from a group consisting of: a chalcogenide, a metal oxide, GeS, GeSe, W03, SbTe, GexSy, GexSey, SbxTey, AgxSey, CuxSy, WOx, TiOx, AlOx, HfOx, CuOx, and TaOx, where 0<x<appropriate stoichiometric value, and where 0<y<appropriate stoichiometric value. 8. The device of claim 7 wherein the second resistive switching material is characterized by the second switching voltage having the second amplitude within a range of about 1.5 volts to about 4 volts. 9. The device of claim 1 wherein the active metal material comprises metal particles selected from a group consisting of: gold, platinum, palladium, aluminum, and nickel. 10. The device of claim 9 wherein the resistive switching material comprises a non-stoichiometric material comprising a plurality of defect sites. 11. The device of claim 9 wherein the resistive switching material comprises a non-stoichiometric silicon oxide comprising a plurality of defect sites. 12. The device of claim 11 wherein at least some of the metal particles from the active metal material are disposed within defect sites from the plurality of defect sites. 13. The device of claim 1 further comprising: a plurality of CMOS devices disposed within the substrate, wherein the plurality of CMOS devices comprise control circuitry for the plurality of resistive switching devices. 14. A method for operating a semiconductor device comprising a substrate, a first plurality of electrodes disposed upon the substrate, wherein each electrode from the first plurality of electrodes comprises a metal containing material, a plurality of resistive switching devices disposed overlying the plurality of first electrodes, wherein each resistive switching device from the plurality of resistive switching devices comprises a first resistive switching material, a second resistive switching material, and at least an active metal material, wherein the first resistive switching material is disposed overlying the first electrode, wherein the second resistive switching material is disposed overlying and contacting the first resistive switching material, wherein the active metal material is disposed overlying the second resistive switching material, wherein the first resistive switching material is characterized by a first switching voltage having a first amplitude, wherein the second resistive switching material is characterized by a second switching voltage having a second amplitude, and wherein the first amplitude is less than the second amplitude, and a second plurality of electrodes disposed above the plurality of resistive switching devices, wherein each electrode from the second plurality of electrodes comprises the metal material, and wherein each electrode from the second plurality of electrodes is disposed overlying and electrically coupled to the active metal material of the resistive switching devices from the plurality of resistive switching devices comprising: applying a first access voltage across a first electrode from the first plurality of electrodes and a first electrode from the second plurality of electrodes to there by apply the first access voltage across a resistive switching device from the plurality of resistive switching devices, wherein an amplitude of the first access voltage is greater than the first amplitude of the first switching voltage, wherein the amplitude of the first access voltage is less than the second amplitude of the second switching voltage to thereby cause first resistive switching material of the switching material stack to change from a high resistance state to a low resistant state; determining a read current flowing across the first electrode from the first plurality of electrodes and the first electrode from the second plurality of electrodes; and determining a state of the resistive switching device in response to the read current. 15. The method of claim 14 wherein a first plurality of resistive switching devices are coupled to the first electrode from the first plurality of electrodes; and wherein a voltage having an amplitude greater than the first amplitude of the first switching voltage is inhibited from being applied to the first plurality of resistive switching devices other than the resistive switching device in response to the applying the first access voltage across the first electrode from the first plurality of electrodes and the first electrode from the second plurality of electrodes. 16. The method of claim 14 wherein a first plurality of resistive switching devices are coupled to the first electrode from the second plurality of electrodes; and

Assignees

Inventors

Classifications

  • Erasing, e.g. resetting, circuits or methods · CPC title

  • Current-voltage curve · CPC title

  • comprising metal oxide memory material, e.g. perovskites · CPC title

  • Write using bi-directional cell biasing · CPC title

  • Reading or sensing circuits or methods · CPC title

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What does patent US9601692B1 cover?
A semiconductor device includes first electrodes disposed upon a substrate, wherein each first electrode comprises a metal containing material, switching devices disposed overlying the first electrodes, wherein each switching device comprises a first switching material, a second switching material, and an active metal, wherein the first switching material is disposed overlying and contacting th…
Who is the assignee on this patent?
Crossbar Inc
What technology area does this patent fall under?
Primary CPC classification H01L45/1253. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 21 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 9 related publications on this page (citations in our corpus or others sharing the same primary CPC).