Silicon-germanium semiconductor devices and method of making

US9595449B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9595449-B1
Application numberUS-201514976522-A
CountryUS
Kind codeB1
Filing dateDec 21, 2015
Priority dateDec 21, 2015
Publication dateMar 14, 2017
Grant dateMar 14, 2017

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Oxidation treatment of a Si 1-x Ge x (0<x<1) substrate forms on the substrate an interfacial layer comprised of silicon oxide and germanium oxide. The presence of germanium oxide in the interfacial layer is deleterious to the quality of the interfacial layer/Si 1-x Ge x conducting channel as evidenced by an increase in charge interface states and a decrease in carrier mobility. Germanium oxide is scavenged from the interfacial layer in a scavenging step comprising heating the interfacial layer/substrate in a hydrogen-containing reducing atmosphere at a temperature of from about 450° C. to about 800° C. to reduce the germanium oxide content of the interfacial layer to not more than about 10% by weight, for example, not more than about 1% by weight, of the weight of the scavenged interfacial layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of refining a mixed silicon oxide-germanium oxide interfacial layer of a silicon-germanium transistor substrate, the method comprising: contacting (i) hydrogen and (ii) the silicon-germanium transistor substrate at a temperature, pressure, and length of time sufficient to scavenge germanium oxide from the mixed silicon oxide-germanium oxide interfacial layer of the silicon-germanium transistor substrate, leaving silicon oxide remaining; wherein the contacting is carried out at a temperature from about 450° C. to about 800° C. in a reducing atmosphere having a hydrogen partial pressure of from about 0.1 Torr to about 15,200 Torr. 2. The method of claim 1 wherein the hydrogen partial pressure is from about 10 Torr to about 600 Torr. 3. The method of claim 1 wherein the interfacial layer has a thickness after the scavenging step of from about 0.1 nanometer to about 1 nanometer. 4. The method of claim 1 wherein the substrate has an atomic germanium content of from about 20% to about 95%. 5. The method of claim 1 wherein the scavenging step reduces the residual germanium oxide content of the interfacial layer to not more than about 10% by weight of the total weight of the interfacial layer remaining after the scavenging step. 6. The method of claim 5 wherein the residual germanium oxide content of the interfacial layer is not more than about 1% by weight of the total weight of the interfacial layer. 7. The method of claim 1 wherein after the scavenging step the interfacial layer comprises from about 30% to about 50% by weight silicon and from about 50% to about 70% by weight oxygen. 8. The method of claim 1 wherein the scavenging step is carried out for a time period of from about 1 to about 15 minutes. 9. The method of claim 1 wherein the reducing atmosphere comprises hydrogen. 10. The method of claim 1 wherein the reducing atmosphere comprises hydrogen and, optionally, an inert gas selected from the class consisting of one or more of nitrogen and argon. 11. The method of claim 10 wherein the hydrogen comprises from about 3 volume % to about 20 volume % of the reducing atmosphere. 12. The method of claim 1 wherein the scavenging step is carried out after the application of a high-k dielectric layer over at least a portion of the interfacial layer. 13. The method of claim 12 wherein the high-k dielectric layer is selected from the class consisting of hafnium oxide, hafnium silicate, zirconium oxide, zirconium silicate, alumina and aluminum silicate, and has a thickness of up to about 3 nanometers. 14. A semiconductor device comprising a silicon-germanium substrate having thereon a silicon oxide interfacial layer made by the method of claim 1 . 15. In a method of making a semiconductor device comprising a silicon-germanium substrate having thereon a silicon oxide-containing interfacial layer formed by oxidizing the silicon-germanium substrate in an oxidation step, the improvement comprising, after the oxidation step: scavenging germanium oxide from the interfacial layer, leaving silicon oxide remaining; wherein scavenging germanium oxide is performed by heating the device at a temperature of from about 450° C. to about 800° C. in a reducing atmosphere having a hydrogen partial pressure of from about 0.1 Torr to about 15,200 Torr to reduce the germanium oxide content of the interfacial layer to not more than about 10% by weight of the interfacial layer remaining after the scavenging step. 16. The method of claim 15 wherein the improvement further comprises applying a high-k dielectric layer to at least a portion of the interfacial layer prior to carrying out the scavenging step. 17. The method of claim 15 wherein the improvement further comprises conducting the scavenging step for a period of from about 1 to about 15 minutes. 18. The method of claim 15 wherein the reducing atmosphere comprises hydrogen and, optionally, an inert gas selected from the class consisting of one or more of nitrogen, argon and helium. 19. The method of claim 18 wherein the hydrogen comprises from about 3 volume % to about 20 volume % of the reducing atmosphere. 20. A semiconductor device comprising a silicon-germanium substrate having thereon a silicon oxide interfacial layer made by the method of claim 15 .

Assignees

Inventors

Classifications

  • of Group IV semiconductors · CPC title

  • Hydrogenation or deuterisation, e.g. using atomic hydrogen from a plasma · CPC title

  • Thermal treatments, e.g. annealing or sintering · CPC title

  • the material being a silicon oxide, e.g. SiO2 · CPC title

  • the insulator being formed after the semiconductor body, the semiconductor being a Group IV material and not being silicon, e.g. Ge, SiGe or SiGeC (H10D64/01364, H10D64/01366 take precedence) · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9595449B1 cover?
Oxidation treatment of a Si 1-x Ge x (0<x<1) substrate forms on the substrate an interfacial layer comprised of silicon oxide and germanium oxide. The presence of germanium oxide in the interfacial layer is deleterious to the quality of the interfacial layer/Si 1-x Ge x conducting channel as evidenced by an increase in charge interface states and a decrease in carrier mobility. Germanium oxid…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H10P95/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 14 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).