Method for depositing extremely low resistivity tungsten

US9589808B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9589808-B2
Application numberUS-201314135375-A
CountryUS
Kind codeB2
Filing dateDec 19, 2013
Priority dateDec 19, 2013
Publication dateMar 7, 2017
Grant dateMar 7, 2017

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  1. Title

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Abstract

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Methods for depositing extremely low resistivity tungsten in semiconductor processing are disclosed herein. Methods involve annealing the substrate at various times during the tungsten deposition process to achieve uniform tungsten layers with substantially lower resistivity.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of forming a tungsten film on a substrate, the method comprising: providing the substrate with a nitride layer; annealing the nitride layer; depositing tungsten directly on the nitride layer to form the tungsten film by introducing a vapor phase tungsten-containing precursor and a boron-containing reactant into a chamber housing the substrate; and annealing the tungsten film, wherein the nitride layer is annealed before the tungsten is deposited, and wherein the nitride layer is annealed at a temperature between about 385° C. and about 445° C., wherein annealing the tungsten film reduces the boron content of the tungsten film by a factor of 10. 2. The method of claim 1 , wherein the nitride layer is a tungsten nitride layer. 3. The method of claim 1 , wherein argon gas is flowed during annealing. 4. The method of claim 1 , wherein the tungsten is deposited by chemical vapor deposition. 5. The method of claim 1 , wherein annealing the nitride layer is performed at conditions to change the grain structure of the nitride layer. 6. The method of claim 1 , wherein depositing the tungsten directly on the nitride layer to form the tungsten layer comprises depositing a tungsten nucleation layer on the nitride layer after annealing the nitride layer, and annealing the tungsten nucleation layer. 7. The method of claim 6 , wherein the nucleation layer is annealed at a temperature between about 385° C. and about 445° C. 8. The method of claim 1 , wherein the tungsten film is annealed for no more than 1 minute. 9. The method of claim 1 , wherein the pressure during the annealing of the tungsten film is at least 1 Torr. 10. The method of claim 1 , wherein the tungsten film nucleates on the nitride layer. 11. The method of claim 1 , wherein the annealing the nitride layer does not change the composition of the nitride layer. 12. The method of claim 1 , wherein the nitride layer is a titanium nitride layer. 13. A method of forming a tungsten film on a substrate, the method comprising: providing the substrate with a nitride layer; changing the grain structure of the nitride layer; and depositing tungsten directly on the nitride layer to form the tungsten film by introducing a vapor phase tungsten-containing precursor and a boron-containing reducing agent into a chamber housing the substrate, wherein the grain structure of the nitride layer is changed before the tungsten is deposited, and wherein the tungsten film formed on the nitride layer has a boron content of less than 1%. 14. The method of claim 13 , wherein changing the grain structure of the nitride layer comprises annealing the nitride layer.

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Classifications

  • by thermal treatment thereof · CPC title

  • Barrier, adhesion or liner layers · CPC title

  • by filling conductive material into holes, grooves or trenches · CPC title

  • for deposition from the gaseous phase, e.g. for chemical vapour deposition [CVD] · CPC title

  • in openings in dielectrics · CPC title

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What does patent US9589808B2 cover?
Methods for depositing extremely low resistivity tungsten in semiconductor processing are disclosed herein. Methods involve annealing the substrate at various times during the tungsten deposition process to achieve uniform tungsten layers with substantially lower resistivity.
Who is the assignee on this patent?
Lam Res Corp
What technology area does this patent fall under?
Primary CPC classification H10P14/43. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 07 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 10 related publications on this page (citations in our corpus or others sharing the same primary CPC).