Chip packaging method, chip packaging module, and embedded substrate chip packaging structure
US-2024413138-A1 · Dec 12, 2024 · US
US9583446B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9583446-B2 |
| Application number | US-201414553358-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 25, 2014 |
| Priority date | Mar 25, 2009 |
| Publication date | Feb 28, 2017 |
| Grant date | Feb 28, 2017 |
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A semiconductor device has a first semiconductor die with a shielding layer formed over its back surface. The first semiconductor die is mounted to a carrier. A first insulating layer is formed over the shielding layer. A second semiconductor die is mounted over the first semiconductor die separated by the shielding layer and first insulating layer. A second insulating layer is deposited over the first and second semiconductor die. A first interconnect structure is formed over the second semiconductor die and second insulating layer. A second interconnect structure is formed over the first semiconductor die and second insulating layer. The shielding layer is electrically connected to a low-impedance ground point through a bond wire, RDL, or TSV. The second semiconductor die may also have a shielding layer formed on its back surface. The semiconductor die are bonded through the metal-to-metal shielding layers.
Opening claim text (preview).
What is claimed: 1. A method of making a semiconductor device, comprising: providing a first semiconductor die; forming a shielding layer over the first semiconductor die; providing a bond wire electrically connected between the shielding layer and a ground point; and disposing a second semiconductor die over the shielding layer with the bond wire disposed between the first semiconductor die and second semiconductor die. 2. The method of claim 1 , further including forming a first interconnect structure over the first semiconductor die. 3. The method of claim 2 , further including forming a second interconnect structure over the second semiconductor die opposite the first interconnect structure. 4. The method of claim 3 , further including forming a conductive pillar between the first interconnect structure and second interconnect structure. 5. The method of claim 2 , further including forming the bond wire electrically connected between the shielding layer and first interconnect structure. 6. The method of claim 1 , further including forming a conductive via through the first semiconductor die. 7. A method of making a semiconductor device, comprising: providing a first semiconductor die; forming a shielding layer over the first semiconductor die; disposing a second semiconductor die over the shielding layer; and depositing an encapsulant around the first semiconductor die and second semiconductor die with a contact pad of the first semiconductor die and a contact pad of the second semiconductor die exposed from the encapsulant. 8. The method of claim 7 , further including forming a first interconnect structure over the encapsulant and electrically connected to the shielding layer. 9. The method of claim 8 , further including forming a second interconnect structure over the encapsulant opposite the first interconnect structure. 10. The method of claim 9 , further including forming a conductive pillar between the first interconnect structure and second interconnect structure. 11. The method of claim 7 , further including forming a bond wire between the shielding layer and first interconnect structure. 12. The method of claim 7 , further including forming a conductive via through the first semiconductor die. 13. The method of claim 7 , further including forming an insulating layer between the first semiconductor die and second semiconductor die. 14. A semiconductor device, comprising: a first semiconductor die; a shielding layer formed over the first semiconductor die; a second semiconductor die disposed over the shielding layer; an encapsulant deposited over the first semiconductor die and second semiconductor die; a first interconnect structure disposed over the first semiconductor die and electrically connected to the shielding layer; and a second interconnect structure disposed over the encapsulant opposite the first interconnect structure. 15. The semiconductor device of claim 14 , further including a conductive pillar disposed between the first interconnect structure and second interconnect structure. 16. The semiconductor device of claim 14 , further including a bond wired disposed between the first semiconductor die and second semiconductor die to electrically connect the shielding layer to the first interconnect structure. 17. The semiconductor device of claim 14 , further including a conductive via formed through the first semiconductor die to electrically connect the shielding layer to the first interconnect structure. 18. The semiconductor device of claim 16 , further including an insulating layer disposed between the first semiconductor die and second semiconductor die with the bond wire extending into the insulating layer. 19. A semiconductor device, comprising: a first semiconductor die; a ground point; a shielding layer formed over the first semiconductor die; a bond wire electrically connected between the shielding layer and ground point; and a second semiconductor die disposed over the shielding layer with the bond wire disposed between the first semiconductor die and second semiconductor die. 20. The semiconductor device of claim 19 , further including a first interconnect structure formed over the first semiconductor die, wherein the first interconnect structure includes the ground point. 21. The semiconductor device of claim 20 , further including a second interconnect structure formed over the second semiconductor die opposite the first interconnect structure. 22. The semiconductor device of claim 19 , further including a conductive via formed through the first semiconductor die. 23. The semiconductor device of claim 19 , further including an insulating layer disposed between the first semiconductor die and second semiconductor die with a portion of the bond wire extending through the insulating layer. 24. A semiconductor device, comprising: a first semiconductor die; a shielding layer formed over the first semiconductor die; a second semiconductor die disposed over the shielding layer; and an encapsulant deposited around the first semiconductor die and second semiconductor die with a contact pad of the first semiconductor die and a contact pad of the second semiconductor die exposed from the encapsulant. 25. The semiconductor device of claim 24 , further including a first interconnect structure formed over the first semiconductor die and encapsulant. 26. The semiconductor device of claim 25 , further including a second interconnect structure formed over the second semiconductor die and encapsulant opposite the first interconnect structure. 27. The semiconductor device of claim 25 , further including a bond wire formed between the shielding layer and first interconnect structure. 28. The semiconductor device of claim 24 , further including a conductive via formed through the first semiconductor die to the shielding layer. 29. The semiconductor device of claim 24 , further including an insulating layer disposed between the first semiconductor die and second semiconductor die.
between a chip and a stacked insulating package substrate, interposer or RDL · CPC title
between stacked chips · CPC title
between a chip and a stacked insulating package substrate, interposer or RDL · CPC title
on active surfaces of flip-chip devices, e.g. underfills · CPC title
Encapsulations, e.g. protective coatings · CPC title
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