Method of etching and cleaning wafers

US9583352B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9583352-B2
Application numberUS-201514829239-A
CountryUS
Kind codeB2
Filing dateAug 18, 2015
Priority dateNov 16, 2012
Publication dateFeb 28, 2017
Grant dateFeb 28, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of operating a wafer processing system includes etching a batch of wafers. The method also includes transferring at least a portion of the batch of wafers to a first front opening universal pod (FOUP). The method further includes purging an interior of the first FOUP with an inert gas. The method additionally includes transporting the first FOUP from a first loading port to a second loading port. The method also includes monitoring an elapsed time from the purging. The method further includes performing a second purging of the interior of the first FOUP if the elapsed time exceeds a threshold time. The method additionally includes cleaning the batch of wafers.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of operating a wafer processing system, the method comprising: etching a batch of wafers; transferring at least a portion of the batch of wafers to a first front opening universal pod (FOUP); purging an interior of the first FOUP with an inert gas; transporting the first FOUP from a first loading port to a second loading port; monitoring an elapsed time from the purging; performing a second purging of the interior of the first FOUP if the elapsed time exceeds a threshold time; transporting an empty FOUP from the second loading port to a mini-stocker, the mini-stocker configured to transfer the empty FOUP to the first loading port; and cleaning the batch of wafers. 2. The method of claim 1 , wherein the at least a portion of the batch of wafers is less than an entirety of the batch of wafers. 3. The method of claim 2 , further comprising: transferring a remaining portion of the batch of wafers into at least one additional FOUP; and repeating the purging step, the transporting step, the monitoring step, and performing the second purge step for each FOUP of the at least one additional FOUP. 4. The method of claim 3 , further comprising: combining the at least a portion of the batch and the remaining portion of the batch following the cleaning step. 5. The method of claim 1 , wherein the transporting the first FOUP to the second loading port comprises: transporting the first FOUP to the mini-stocker, the mini-stocker configured to perform the second purging if the elapsed time exceeds the threshold time; and transferring the first FOUP from the mini-stocker to the second loading port, the second loading port configured to perform the second purging if the elapsed time exceeds the threshold time. 6. The method of claim 1 , wherein the etching the batch of wafers comprises performing a dry etching process. 7. The method of claim 1 , wherein the cleaning the batch of wafers comprises performing a wet cleaning process. 8. A method, comprising: controlling a nozzle to regulate flow of an inert gas from a connector to a front opening universal pod (FOUP) to purge an interior of the FOUP of moisture; comparing a time duration following a purge with a predetermined threshold; actuating the nozzle to allow the inert gas to flow into the FOUP based on the comparison of the time duration and the predetermined threshold and a door of the FOUP being in a closed position; preventing actuation of the nozzle based on the door of the FOUP being in an open position; and closing the door of the FOUP when a predetermined quantity of wafers is contained within the FOUP. 9. The method of claim 8 , wherein the time duration is determined while the FOUP is occupied by one or more wafers. 10. The method of claim 8 , further comprising: determining a transition of the door of the FOUP from the open position to the closed position; and actuating the nozzle to allow the inert gas to flow into the FOUP upon determining the transition of the door of the FOUP from the open position to the closed position. 11. The method of claim 8 , further comprising: determining a position of the FOUP in a wafer processing system; and actuating the nozzle to allow the inert gas to flow into the FOUP based on the determined position of the FOUP. 12. The method of claim 11 , wherein the position of the FOUP in the wafer processing system is one of a first position or a second position, the nozzle is one of a first nozzle corresponding to the first position or a second nozzle corresponding to the second position, and actuating the nozzle to allow the inert gas to flow into the FOUP comprises: actuating the first nozzle if the FOUP is in the first position or actuating the second nozzle if the FOUP is in the second position. 13. The method of claim 8 , wherein controlling the nozzle to regulate flow of the inert gas comprises regulating the flow of a nitrogen gas. 14. The method of claim 8 , further comprising actuating the nozzle to perform an initial purge of the FOUP in response to the door of the FOUP closing. 15. A method, comprising: determining a time duration following a purge of a front opening universal pod (FOUP); comparing the determined time duration with a predetermined threshold; determining whether a door of the FOUP is in an open position or a closed position; actuating a nozzle to allow an inert gas to flow into the FOUP based on the determined time duration exceeding the predetermined threshold and the door of the FOUP being in the closed position; preventing actuation of the nozzle based on the door of the FOUP being in the open position; and closing the door of the FOUP based on a predetermined quantity of wafers being contained within the FOUP. 16. The method of claim 15 , wherein the time duration is determined while the FOUP is occupied by one or more wafers. 17. The method of claim 15 , further comprising: determining a transition of the door of the FOUP from the open position to the closed position, wherein the nozzle is actuated to allow the inert gas to flow into the FOUP upon determining the transition of the door of the FOUP from the open position to the closed position. 18. The method of claim 15 , further comprising: determining a position of the FOUP in a wafer processing system, wherein actuating the nozzle to allow the inert gas to flow into the FOUP is further based on the determined position of the FOUP. 19. The method of claim 18 , wherein the position of the FOUP in the wafer processing system is one of a first position or a second position, the nozzle is one of a first nozzle corresponding to the first position or a second nozzle corresponding to the second position, and actuating the nozzle to allow the inert gas to flow into the FOUP comprises: actuating the first nozzle if the FOUP is in the first position or actuating the second nozzle if the FOUP is in the second position. 20. The method of claim 15 , wherein the inert gas is a nitrogen gas.

Assignees

Inventors

Classifications

  • by chemical etching · CPC title

  • of substrates stored in a container, a magazine, a carrier, a boat or the like · CPC title

  • for wet etching · CPC title

  • for drying etching · CPC title

  • characterised by multiple measurements, corrections, marking or sorting processes · CPC title

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What does patent US9583352B2 cover?
A method of operating a wafer processing system includes etching a batch of wafers. The method also includes transferring at least a portion of the batch of wafers to a first front opening universal pod (FOUP). The method further includes purging an interior of the first FOUP with an inert gas. The method additionally includes transporting the first FOUP from a first loading port to a second lo…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10P72/0604. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 28 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).