Molded glass lid for wafer level packaging of opto-electronic assemblies

Patent metadata

Field	Value
Publication number	US-9575266-B2
Application number	US-201514687119-A
Country	US
Kind code	B2
Filing date	Apr 15, 2015
Priority date	Oct 19, 2011
Publication date	Feb 21, 2017
Grant date	Feb 21, 2017

Abstract

An opto-electronic assembly is provided comprising a substrate (generally of silicon or glass) for supporting a plurality of interconnected optical and electrical components. A layer of sealing material is disposed to outline a defined peripheral area of the substrate. A molded glass lid is disposed over and bonded to the substrate, where the molded glass lid is configured to create a footprint that matches the defined peripheral area of the substrate. The bottom surface of the molded glass lid includes a layer of bonding material that contacts the substrate's layer of sealing material upon contact, creating a bonded assembly. In one form, a wafer level assembly process is proposed where multiple opto-electronic assemblies are disposed on a silicon wafer and multiple glass lids are molded in a single sheet of glass that is thereafter bonded to the silicon wafer.

First claim

What is claimed is:

1. An opto-electronic assembly, comprising
a substrate supporting a plurality of interconnected optical and electrical components, the substrate including a layer of sealing material disposed to outline a defined area of a top surface thereof; and
a molded glass lid disposed over and bonded to the substrate, the molded glass lid configured to create a footprint that matches the defined area of the substrate and including a layer of bonding material on a bottom surface, and the layer of bonding material contacting the layer of sealing material upon placement of the molded glass lid on the substrate to create a bonded assembly,
wherein the molded glass lid comprises an indentation formed by first, second, and third portions of a sidewall perpendicular to the top surface, wherein the first and second portions comprise opposing surfaces in a facing relationship and the third portion extends between the first and second portions, wherein the third portion comprises an optical window through which optical signals are transmitted between optical components on the substrate and external optical elements.

2. The opto-electronic assembly as defined in claim 1 wherein the molded glass lid is coated with an anti-reflective material.

3. The opto-electronic assembly as defined in claim 2 wherein the anti-reflective material comprises magnesium fluoride.

4. The opto-electronic assembly as defined in claim 1 wherein the molded glass lid is coated with an anti-reflective material in all areas except for the sidewall.

5. The opto-electronic assembly as defined in claim 1 wherein the layer of sealing material on the substrate comprises a gold-tin solder material.

6. The opto-electronic assembly as defined in claim 5 wherein the layer of bonding material on the molded glass lid comprises a metallic compound for creating a solder seal with the gold-tin solder material.

7. The opto-electronic assembly as defined in claim 6 wherein the metallic compound comprises titanium, copper and gold.

8. The opto-electronic assembly as defined in claim 1 wherein the substrate comprises a silicon substrate.

9. The opto-electronic assembly as defined in claim 1 wherein the substrate comprises a glass substrate.

10. A wafer level opto-electronic assembly comprising:
a silicon wafer populated with a plurality of opto-electronic modules in separate die locations, with a separate sealing layer disposed to surround each individual opto-electronic module; and
a glass substrate molded to include a plurality of lid encapsulates in separate die locations, each lid encapsulate including a bonding material on a top surface thereof such that when the glass substrate is inverted and attached to the silicon wafer, the lid encapsulate bonding material contacts an associated sealing layer, creating a bond there between and forming a plurality of encapsulated opto-electronic modules,
wherein each lid encapsulates comprises an indentation formed by first, second, and third portions of a sidewall perpendicular to the top surface, wherein the first and second portions comprise opposing surfaces in a facing relationship and the third portion extends between the first and second portions, wherein the third portion comprises an optical window through which optical signals are transmitted between optical components in a respective opto-electronic module and external optical elements.

11. The wafer level opto-electronic assembly as defined in claim 10 wherein the glass substrate is coated with an anti-reflective material.

12. The wafer level opto-electronic assembly as defined in claim 10 wherein each lid encapsulate is configured to include an optical window along a portion thereof.

Assignees

• Cisco Tech Inc

Inventors

• DESAI Kishor
• Kachru Ravinder
• Patel Vipulkumar
• Dama Bipin
• Shastri Kalpendu
• Pathak Soham

Classifications

• H10W76/18

  Insulating materials, e.g. resins, glasses or ceramics · CPC title

• H10W76/67

  characterised by their materials · CPC title

• H10W95/00

  Packaging processes not covered by the other groups of this subclass · CPC title

• H10W90/00

  Package configurations · CPC title

• H10W76/12

  characterised by their shape · CPC title