Mechanism To Enhance PCIe Generation Switching
US-2024427710-A1 · Dec 26, 2024 · US
US9547472B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9547472-B2 |
| Application number | US-201414466538-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 22, 2014 |
| Priority date | Sep 18, 2013 |
| Publication date | Jan 17, 2017 |
| Grant date | Jan 17, 2017 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
The present disclosure relates to methods and systems for performing operations in a communications protocol. An example method can include submitting, from a device, a request for a queue entry representing a command from a host comprising a request for data stored at a device memory location; receiving the command from the host; and executing the command. An example method can also include selecting a bit string representing whether a requested data stream has been received, and storing the bit string into a memory buffer portion to mark the buffer portion. The method can include receiving, into the memory buffer, the stream. The method can include retrieving contents of the buffer portion, and determining whether the contents contain the bit string. If so, the method can include determining that portions of the stream have not been received. Otherwise, the method can include determining that the stream has been received.
Opening claim text (preview).
What is claimed is: 1. A method of performing operations in a communications protocol, the method comprising: selecting a bit string to indicate whether all data packets for a requested data stream have been received, wherein the bit string is selected to differ from a bit sequence contained in each of the data packets of the requested data stream; storing the selected bit string into a plurality of portions of a memory buffer so as to mark the portions of the memory buffer with the selected bit string; receiving, into the memory buffer, at least a portion of the data packets of the requested data stream; for each data packet that is received into one of the plurality of portions of the memory buffer, overwriting the selected bit string with the bit sequence contained in the received data packet; polling data content of the plurality of portions of the memory buffer for the selected bit string; determining that portions of the requested data stream have not yet been received when the data content of any of the plurality of portions of the memory buffer contains the selected bit string; and determining that all the data packets for the requested data stream has been received successfully when the data content of the plurality of portions of the memory buffer does not contain the selected bit string. 2. The method of claim 1 , wherein storing the selected bit string into the portion of the memory buffer comprises: segmenting the memory buffer into a plurality of portions based on a size of a transaction-layer packet (TLP) in a peripheral component interconnect express (PCIe) standard, and storing the selected bit string into the segmented plurality of portions of the memory buffer. 3. The method of claim 1 , wherein selecting the bit string comprises: determining a size of the bit string based on a total capacity of the storage medium and on a size of an individual portion of the requested data stream; and selecting a value for the bit string based on the determined size of the bit string. 4. The method of claim 3 , wherein determining the size of the bit string comprises calculating a log 2 of the total capacity of the storage medium divided by the size of the individual portion of the requested data stream. 5. The method of claim 3 , wherein the value for the bit string comprises a random bit sequence, wherein a length of the random bit sequence is based on the determined size of the bit string. 6. The method of claim 3 , wherein the value for the bit string is selected during an initial power-up of at least one of a host and a storage device. 7. The method of claim 3 , wherein the value for the bit string is selected upon a determination that a write operation to a storage device has invalidated a current value for the bit string. 8. The method of claim 1 , wherein the communication protocol includes commands with command formats compatible with the Non-Volatile Memory Express standard. 9. A system for performing operations in a communications protocol, the system comprising: memory in communication with a host; an interface, between the host and a target, for transmitting a requested data stream; storage, in communication with the target, for storing and retrieving the requested data stream; and a processor in communication with the host, with the memory, and with the storage, the processor configured to: select a bit string to indicate whether all the data packets for a requested data stream have been received, wherein the bit string is selected to differ from a bit sequence contained in each of the data packets of the requested data stream; store the selected bit string into portions of a memory buffer so as to mark the portions of the memory buffer with the selected bit string; receive, into the memory buffer, at least a portion of the data packets of the requested data stream; for each data packet that is received into one of plurality of portions of the memory buffer, overwrite the selected bit string with the bit sequence contained in the received data packet; poll data content of the plurality of portions of the memory buffer for the selected bit string; determine that portions of the requested data stream have not yet been received when the data content of any of the plurality of portions of the memory buffer contains the selected bit string; and determine that all the data packets for the requested data stream have been received successfully when the data content of the plurality of portions of the memory buffer does not contain the selected bit string. 10. The system of claim 9 , wherein processor configured to store the selected bit string into the portion of the memory buffer comprises the processor being configured to: segment the memory buffer into a plurality of portions, wherein a size of each portion is based on a size of a transaction-layer packet (TLP) in a peripheral component interconnect express (PCIe) standard; and store the selected bit string into the segmented plurality of portions of the memory buffer. 11. The system of claim 9 , wherein the processor configured to select the bit string comprises the processor being configured to: determine a size of the bit string based on a total capacity of the storage medium and on a size of an individual portion of the requested data stream; and select a value for the bit string based on the determined size of the bit string. 12. The system of claim 11 , wherein processor configured to determine the size of the bit string comprises the processor being configured to calculate a log 2 of the total capacity of the storage medium divided by the size of the individual portion of the requested data stream. 13. The system of claim 11 , wherein the value for the bit string comprises a random bit sequence, wherein a length of the random bit sequence is based on the determined size of the bit string. 14. The system of claim 11 , wherein the value for the bit string is selected during an initial power-up of at least one of a host and a storage device. 15. The system of claim 11 , wherein the value for the bit string is selected upon a determination that a write operation to a storage device has invalidated a current value for the bit string. 16. The system of claim 1 , wherein the communication protocol includes commands with command formats compatible with the Non-Volatile Memory Express standard.
for adaptation of a particular data processing system to different peripheral devices · CPC title
Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title
Cross-Sectional Technologies · mapped topic
with request queuing · CPC title
Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.