In-situ formation of silicon and tantalum containing barrier

US9543234B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9543234-B2
Application numberUS-201414586380-A
CountryUS
Kind codeB2
Filing dateDec 30, 2014
Priority dateJun 24, 2011
Publication dateJan 10, 2017
Grant dateJan 10, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A method includes forming an opening in a dielectric layer, and forming a silicon rich layer on a surface of the dielectric layer. A portion of the silicon rich layer extends into the opening and contacts the dielectric layer. A tantalum-containing layer is formed over and the contacting the silicon rich layer. An annealing is performed to react the tantalum-containing layer with the silicon rich layer, so that a tantalum-and-silicon containing layer is formed.

First claim

Opening claim text (preview).

What is claimed is: 1. A device comprising: a first conductive feature; a tantalum-and-silicon containing layer comprising opposite portions on opposite sides of the first conductive feature, wherein the tantalum-and-silicon containing layer is a single layer comprising both tantalum and silicon; a dielectric material comprising opposite portions, wherein the first conductive feature and the tantalum-and-silicon containing layer are between the opposite portions of the dielectric material; a second conductive feature underlying and electrically connected to the first conductive feature; and a semiconductor substrate, wherein the first conductive feature, the tantalum-and-silicon containing layer, and the dielectric material penetrate through the semiconductor substrate, wherein the tantalum-and-silicon containing layer has a first surface contacting the second conductive feature, and a second surface opposite to the first surface, and the second surface is coplanar with a surface of the semiconductor substrate. 2. The device of claim 1 , wherein a bottom end of the tantalum-and-silicon containing layer is in contact with a top surface of the second conductive feature. 3. The device of claim 1 further comprising a tantalum-containing layer comprising opposite portions on opposite sides of the first conductive feature, wherein the tantalum-containing layer is substantially free from silicon, and the tantalum-containing layer is in contact with both the tantalum-and-silicon containing layer and the first conductive feature. 4. The device of claim 1 , wherein sidewalls of the first conductive feature are in contact with sidewalls of the tantalum-and-silicon containing layer. 5. The device of claim 1 , wherein the tantalum-and-silicon containing layer comprises tantalum silicon nitride, and the device further comprises a tantalum nitride layer between and contacting both the tantalum-and-silicon containing layer and the first conductive feature. 6. A device comprising: a semiconductor substrate; an interconnect structure comprising a plurality of metal layers, wherein the interconnect structure is on a first side of the semiconductor substrate; an opening extending from a second side of the semiconductor substrate to reach one of the plurality of metal layers; a dielectric layer disposed in the opening, wherein the one of the plurality of metal layers is exposed through a portion of the opening between opposite portions of the dielectric layer; and a tantalum silicon nitride layer encircled by the dielectric layer, wherein the tantalum silicon nitride layer has a first end contacting the one of the plurality of metal layers, and a second end coplanar with a surface of the semiconductor substrate. 7. The device of claim 6 further comprising a conductor in the opening and in contact with the tantalum silicon nitride layer. 8. The device of claim 7 further comprising a tantalum nitride layer between, and contacting, the conductor and the tantalum silicon nitride layer. 9. The device of claim 7 further comprising a tantalum layer between, and contacting, the conductor and the tantalum silicon nitride layer. 10. The device of claim 6 , wherein the tantalum silicon nitride layer extends from the first side to the second side of the semiconductor substrate. 11. The device of claim 8 , wherein the tantalum nitride layer is spaced apart from the one of the plurality of metal layers. 12. A device comprising: a dielectric layer with an opening therein; a tantalum silicon nitride layer contacting sidewalls of the dielectric layer, with the sidewalls facing the opening, wherein the tantalum silicon nitride layer has a first atomic ratio of tantalum atoms to nitrogen atoms; a tantalum nitride layer encircled by the tantalum silicon nitride layer, wherein the tantalum nitride layer has a second atomic ratio of tantalum atoms to nitrogen atoms, and the first atomic ratio is equal to the second atomic ratio; a first conductive feature encircled by the tantalum nitride layer; and a second conductive feature underlying the dielectric layer, wherein the first conductive feature and a bottom end of the tantalum silicon nitride layer are in physical contact with a top surface of the second conductive feature. 13. The device of claim 12 , wherein a bottom surface of the tantalum nitride layer is higher than the top surface of the second conductive feature. 14. The device of claim 12 further comprising a semiconductor substrate, wherein the first conductive feature, the tantalum silicon nitride layer, and the dielectric layer penetrate through the semiconductor substrate, and each of the first conductive feature, the tantalum silicon nitride layer, and the dielectric layer comprises: a first surface contacting the second conductive feature; and a second surface coplanar with a surface of the semiconductor substrate. 15. The device of claim 14 further comprising an image sensor formed at a surface of the semiconductor substrate. 16. The device of claim 5 , wherein the tantalum-and-silicon containing layer has a first atomic ratio of tantalum atoms to nitrogen atoms, and the tantalum nitride layer has a second atomic ratio of tantalum atoms to nitrogen atoms, wherein the first atomic ratio is equal to the second atomic ratio. 17. The device of claim 8 , wherein the tantalum silicon nitride layer has a first atomic ratio of tantalum atoms to nitrogen atoms, and the tantalum nitride layer has a second atomic ratio of tantalum atoms to nitrogen atoms, wherein the first atomic ratio is equal to the second atomic ratio. 18. The device of claim 1 , wherein a compound of titanium and silicon in the tantalum-and-silicon containing layer is in contact with the dielectric material.

Assignees

Inventors

Classifications

  • H10P95/00Primary

    Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass · CPC title

  • Interconnections or connectors in packages · CPC title

  • by contacting with gases, liquids or plasmas · CPC title

  • by forming openings in the dielectric parts · CPC title

  • by introducing additional elements therein · CPC title

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What does patent US9543234B2 cover?
A method includes forming an opening in a dielectric layer, and forming a silicon rich layer on a surface of the dielectric layer. A portion of the silicon rich layer extends into the opening and contacts the dielectric layer. A tantalum-containing layer is formed over and the contacting the silicon rich layer. An annealing is performed to react the tantalum-containing layer with the silicon ri…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10P95/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 10 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).