Systems and methods for detecting endpoint for through-silicon via reveal applications

Patent metadata

Field	Value
Publication number	US-9543225-B2
Application number	US-201414265275-A
Country	US
Kind code	B2
Filing date	Apr 29, 2014
Priority date	Apr 29, 2014
Publication date	Jan 10, 2017
Grant date	Jan 10, 2017

Abstract

Systems and methods for processing a semiconductor wafer includes a plasma processing chamber. The plasma processing chamber includes an exterior, an interior region with a wafer receiving mechanism and a viewport disposed on a sidewall of the plasma processing chamber providing visual access from the exterior to the wafer received on the wafer receiving mechanism. A camera is mounted to the viewport of the plasma processing chamber on the exterior and coupled to an image processor. The image processor includes pattern recognition logic to match images of emerging pattern captured and transmitted by the camera, to a reference pattern and to generate signal defining an endpoint when a match is detected. A system process controller coupled to the image processor and the plasma processing chamber receives the signal from the image processor and adjusts controls of one or more resources to stop the etching operation.

First claim

What is claimed is:

1. A plasma processing system, comprising:
a plasma processing chamber having an exterior, an interior region equipped with an electrostatic chuck assembly for receiving a semiconductor wafer, and a viewport providing visual access from the exterior to at least a portion of the semiconductor wafer when present on the electrostatic chuck assembly, wherein the viewport is disposed on a side wall of the plasma processing chamber such that the viewport is below a transformer-coupled plasma (TCP) window defined on the side wall of the chamber that is above the surface of the semiconductor wafer, the viewport providing an unobstructed view of the portion of the surface of the semiconductor wafer;
a camera mounted to the viewport of the plasma processing chamber on the exterior, the camera configured to take sequential images of a pattern emerging on the portion of the semiconductor wafer during an etching operation;
an image processor coupled to the camera, the image processor being in communication with pattern recognition logic to match the images transmitted by the camera at regular intervals, to a reference pattern and to generate a signal identifying an endpoint to the etch operation, upon detection of a match; and
a host computer in communication with the image processor and the plasma processing chamber, the host computer configured to receive the signal identifying the end point that causes the etch operation to stop.

2. The plasma processing system of claim 1 , wherein the camera provides a skewed view of the semiconductor wafer when present on the chuck assembly, based on angle at which the camera is mounted.

3. The plasma processing system of claim 1 , wherein the pattern emerging on the portion of the semiconductor wafer relates to pillar structures defined on the semiconductor wafer, the pattern identifying amount of pillars emerging as a result of the etching operation.

4. The plasma processing system of claim 1 , wherein the viewport is disposed at a pinnacle defined in the side wall of the plasma processing chamber, the viewport providing an unobstructed view of the portion of the surface of the semiconductor wafer.

5. The plasma processing system of claim 1 , wherein a light source for illuminating the pattern emerging on the semiconductor wafer for the camera to capture images, is provided by a plasma in the plasma processing chamber.

6. The plasma processing system of claim 1 , wherein a light source for illuminating the pattern emerging on the semiconductor wafer for capturing of the images by the camera, is provided by an external lamp that is coupled to the camera.

7. The plasma processing system of claim 1 , wherein the regular intervals for capturing the images is programmable based on type of pattern emerging from the etching operation.

8. The plasma processing system of claim 1 , wherein the images of the emerging pattern capture a height of different structures as the structures emerge during the etching operation, the height of the structures in the emerging pattern defined by amount of exposure to etchant chemistry.

9. The plasma processing system of claim 1 , wherein the match is determined by matching a skewed view of the emerging pattern captured at an angle by the camera to corresponding skewed view of the reference pattern captured at the same angle.

10. The plasma processing system of claim 9 , wherein the match is established when the emerging pattern matches to the reference pattern above a threshold percent.

11. The plasma processing system of claim 1 , further includes a second viewport providing visual access to the portion of the semiconductor wafer, the second viewport having a second camera mounted thereon to capture the images from a different view angle, wherein the second camera together with the camera acts as a stereo camera providing three-dimensional attribute of the emerging pattern.

12. The plasma processing system of claim 1 , wherein the image processor is configured to adjust one or more etching parameters based on the images of the emerging pattern received from the camera, the adjusted etching parameters used in controlling subsequent etching operation to be performed within the plasma processing chamber.

13. A plasma processing system for determining endpoint of a plasma etching operation on a top surface of a semiconductor wafer, comprising:
a plasma processing chamber having an exterior, an interior region equipped with a wafer receiving mechanism for receiving the semiconductor wafer, and at least two viewports providing visual access from the exterior to the top surface of the semiconductor wafer when received on the wafer receiving mechanism, wherein the viewports are disposed on side walls of the plasma processing chamber;
a camera mounted to each of the two viewports of the plasma processing chamber on the exterior, each of the cameras configured to take sequential images of a pattern emerging on the top surface of the semiconductor wafer during an active etching operation, the cameras acting as stereo camera to provide three dimensional view of the emerging pattern;
an external light source coupled to each of the cameras, light pulse from each of the external light source directed toward the top surface of the semiconductor wafer within the plasma processing chamber to illuminate the pattern emerging on the semiconductor wafer for the cameras during capturing of the images; and
a processor coupled to the cameras and the plasma processing chamber, the processor equipped with a pattern recognition logic configured to detect the emerging pattern from the images captured and transmitted by the cameras at regular intervals, match the emerging pattern to a reference pattern and generate a signal identifying endpoint, when a match is detected, the generated signal causing the etch operation to stop.

14. The plasma processing system of claim 13 , wherein each of the cameras provides a skewed view of the semiconductor wafer when present on the wafer receiving mechanism, the skewed view based on angle at which each of the cameras is mounted.

15. The plasma processing system of claim 13 , wherein the processor is defined by a host computer, the host computer includes an image processor and a controller, the image processor used in identifying the reference pattern for matching to the emerging patterns captured in the images by the cameras, the identified reference pattern used for matching is captured at an angle that matches with the angle at which the images of the emerging pattern are captured by the cameras, and the controller is used to generate a signal causing the etch operation to stop.

16. The plasma processing system of claim 13 , wherein the processor is defined by a controller that is provided at a wall of the plasma processing chamber, the controller used in identifying the reference pattern, wherein the reference pattern used for matching is captured at an angle that matches with the angle at which the images of the emerging pattern are captured by the cameras, perform the matching and generate the signal causing the etch operation to stop.

17. The plasma processing system of claim 13 , wherein light source for illuminating the semiconductor wafer during capturing of the images of the emerging pattern, is provided by one of the plasma within the plasma processing chamber, an external flash lamp, an external light source, or any combinations thereof.

Assignees

• Lam Res Corp

Inventors

• Miller Alan Jeffrey
• Sevillano Evelio
• Luque Jorge
• Bailey Iii Andrew D
• Xu Qing

Classifications

• H10W20/0245

  comprising use of blind vias during the manufacture · CPC title

• H10P74/203

  Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

• H10P72/0604

  Process monitoring, e.g. flow or thickness monitoring · CPC title

• H10P50/242

  of Group IV materials · CPC title

• H10W20/023

  the interconnections being through-semiconductor vias · CPC title