Electrostatic chuck and method of manufacturing semiconductor device

Patent metadata

Field	Value
Publication number	US-9543182-B2
Application number	US-201113305139-A
Country	US
Kind code	B2
Filing date	Nov 28, 2011
Priority date	Nov 29, 2010
Publication date	Jan 10, 2017
Grant date	Jan 10, 2017

Abstract

An electrostatic chuck device including: a plurality of adsorption areas having an electrode generating electrostatic attractive force; and a control portion controlling the electrostatic attractive force against each of the plurality of the adsorption areas independently of other adsorption areas.

First claim

What is claimed is:

1. A method of manufacturing a semiconductor device comprising:
adsorbing a plurality of first semiconductor chips periodically arrayed at a first interval with use of a first substrate including an electrostatic chuck device, protective films being formed on surfaces of the plurality of first semiconductor chips respectively;
reducing adsorbing force against a plurality of second semiconductor chips among the plurality of first semiconductor chips periodically located at a second interval that is larger than the first interval by controlling adsorbing force of the first substrate;
picking up simultaneously the plurality of second semiconductor chips through the protective films against which the adsorbing force was reduced;
adhering simultaneously the plurality of second semiconductor chips to a second substrate; and
removing the protective films from the plurality of second semiconductor chips after adhering simultaneously the plurality of second semiconductor chips to the second substrate,
wherein the electrostatic chuck device comprises:
a plurality of non-overlapping and predefined adsorption areas formed on a surface of said electrostatic chuck device, each of said plurality of adsorption areas comprising a plurality of first electrodes and a plurality of second electrodes alternately provided, each of the plurality of adsorption areas adsorbing a single first semiconductor chip, the plurality of adsorption areas being periodically arrayed in a matrix at the first interval;
a first wiring electrically coupling between the plurality of first electrodes in an identical absorption area, the plurality of first electrodes of one of the plurality of adsorption areas being electrically isolated from the plurality of first electrodes of other adsorption areas;
a second wiring electrically coupling between the plurality of second electrodes in the identical adsorption area, the plurality of second electrodes of one of the plurality of adsorption areas being electrically isolated from the plurality of second electrodes of other adsorption areas; and
a control portion configured to control an electrostatic attractive force of each of the plurality of adsorption areas independently of other adsorption areas by applying a positive voltage and a negative voltage respectively to the first wiring and the second wiring of each of the plurality of adsorption areas independently of other adsorption areas.

2. The method as claimed in claim 1 , wherein the picking up of the plurality of second semiconductor chips is performed by using an electrostatic chuck device.

3. The method as claimed in claim 1 , wherein:
the second substrate has a connection pad to be electrically coupled to an outer component; and
the method further comprises forming a wiring between the pad and the plurality of second semiconductor chips after adhering the plurality of second semiconductor chips.

4. The method as claimed in claim 1 , further comprising:
forming a plurality of semiconductor elements of which side faces are spaced from each other on a third substrate, the plurality of semiconductor elements being periodically arranged at the first interval; and
forming the plurality of first semiconductor chips periodically arrayed at the first interval by etching the third substrate.

5. The method as claimed in claim 1 , wherein the adhering comprises:
moving the picked-up plurality of second semiconductor chips to a substrate having an electrostatic chuck device;
adhering the plurality of second semiconductor chips on the substrate to another substrate; and
adhering the plurality of second semiconductor chips on the another substrate to the second substrate.

6. The method as claimed in claim 1 further comprising:
arraying the plurality of second semiconductor chips at the second interval larger than the first interval by performing the picking up of the plurality of second semiconductor chips multiple times.

7. The method as claimed in claim 1 wherein:
a plurality of groups of the plurality of first semiconductor chips arrayed at the first interval are prepared;
the picking up of the plurality of second semiconductor chips are performed with respect to each of the groups; and
the plurality of second semiconductor chips picked up from the groups are adhered to the second substrate.

8. A method of manufacturing a semiconductor device comprising:
picking up simultaneously a plurality of first semiconductor chips periodically arrayed at a first interval through protective films respectively from a plurality of second semiconductor chips, of which the protective films are formed on surfaces, periodically arrayed at a second interval smaller than the first interval with use of an electrostatic chuck device;
adhering simultaneously the plurality of first semiconductor chips to a second substrate; and
removing the protective films from the plurality of first semiconductor chips after adhering simultaneously the plurality of first semiconductor chips to the second substrate,
wherein the electrostatic chuck device comprises:
a plurality of non-overlapping and predefined adsorption areas formed on a surface of said electrostatic chuck device, each of said plurality of adsorption areas comprising a plurality of first electrodes and a plurality of second electrodes alternately provided, each of the plurality of adsorption areas adsorbing a single second semiconductor chip, the plurality of adsorption areas being periodically arrayed in a matrix at the second interval;
a first wiring electrically coupling between the plurality of first electrodes in an identical adsorption area, the plurality of first electrodes of one of the plurality of adsorption areas being electrically isolated from the plurality of first electrodes of other adsorption areas;
a second wiring electrically coupling between the plurality of second electrodes in the identical adsorption area, the plurality of second electrodes of one of the plurality of adsorption areas being electrically isolated from the plurality of second electrodes of other of adsorption areas; and
a control portion configured to control an electrostatic attractive force of each of the plurality of adsorption areas independently of other adsorption areas by applying a positive voltage and a negative voltage respectively to the first wiring and the second wiring of each of the plurality of adsorption areas independently of other adsorption areas.

9. The method as claimed in claim 8 , wherein:
the second substrate has a connection pad to be electrically coupled to an outer component; and
the method further comprises forming a wiring between the pad and the plurality of first semiconductor chips after adhering the plurality of first semiconductor chips.

10. The method as claimed in claim 8 , further comprising:
forming a plurality of semiconductor elements of which side faces are spaced from each other on a third substrate, the plurality of semiconductor elements being periodically arranged at the second interval; and
forming the plurality of second semiconductor chips periodically arrayed at the second interval by etching the third substrate.

11. The method as claimed in claim 8 , wherein the adhering comprises:
moving the picked-up plurality of first semiconductor chips to a substrate having an electrostatic chuck device;
adhering the plurality of first semiconductor chips on the substrate to another substrate; and
adhering the plurality of first semiconductor chips on the another substrate to the second substrate.

12. The method as claimed in claim 8 further comprising:
arraying the plurality of first semiconductor chi

Assignees

• Furuya Akira
• Kitamura Takamitsu
• Sumitomo Electric Industries

Inventors

• Furuya Akira
• Kitamura Takamitsu

Classifications

• H10P72/722 Primary

  Details of electrostatic chucks · CPC title

• H01L21/6833 Primary

  Electricity · mapped topic