Bonding wire for semiconductor device use and method of production of same

US9536854B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9536854-B2
Application numberUS-201514893833-A
CountryUS
Kind codeB2
Filing dateMar 31, 2015
Priority dateMar 31, 2014
Publication dateJan 3, 2017
Grant dateJan 3, 2017

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Bonding wire for semiconductor device use where both leaning failures and spring failures are suppressed by (1) in a cross-section containing the wire center and parallel to the wire longitudinal direction (wire center cross-section), there are no crystal grains with a ratio a/b of a long axis “a” and a short axis “b” of 10 or more and with an area of 15 μm 2 or more (“fiber texture”), (2) when measuring a crystal direction in the wire longitudinal direction in the wire center cross-section, the ratio of crystal direction <100> with an angle difference with respect to the wire longitudinal direction of 15° or less is, by area ratio, 50% to 90%, and (3) when measuring a crystal direction in the wire longitudinal direction at the wire surface, the ratio of crystal direction <100> with an angle difference with respect to the wire longitudinal direction of 15° or less is, by area ratio, 50% to 90%. During the drawing step, a drawing operation with a rate of reduction of area of 15.5% or more is performed at least once. The final heat treatment temperature and the pre-final heat treatment temperature are made predetermined ranges.

First claim

Opening claim text (preview).

The invention claimed is: 1. Bonding wire for semiconductor device use with an Ag content of 90 mass % or more, wherein, in a wire center cross-section, which is a cross-section containing the wire center and parallel to the wire longitudinal direction, there are no crystal grains with a ratio a/b of a long axis “a” and a short axis “b” of 10 or more and with an area of 15 μm 2 or more, when measuring a crystal direction in the wire longitudinal direction in said wire center cross-section, the ratio of crystal direction <100> with an angle difference with respect to said wire longitudinal direction of 15° or less is, by area ratio, 50% to 90%, and when measuring a crystal direction in the wire longitudinal direction at the wire surface, the ratio of crystal direction <100> with an angle difference with respect to said wire longitudinal direction of 15° or less is, by area ratio, 50% to 90%. 2. The bonding wire for semiconductor device use according to claim 1 , wherein said bonding wire for semiconductor device use contains one or more of Pd, Cu, Au, Zn, Pt, Ge, Sn, Ti, and Ni, when containing Pd, Cu, Au, and Zn, contains these in a total of 0.01 mass % to 8 mass %, when containing Pt, Ge, Sn, Ti, and Ni, contains these in a total of 0.001 mass % to 1 mass %, and has a balance of Ag and impurities. 3. The bonding wire for semiconductor device use according to claim 1 or 2 , wherein S contained in said impurities is 1 mass ppm or less and Cl is 0.5 mass ppm or less. 4. A method of production of bonding wire for semiconductor device use according to claim 1 or 2 , in which the method has a drawing step which performs one or more drawing operations, has, in the drawing step, at least one drawing operation which has a rate of reduction of area of 15.5% to 30.5%, and performs one or more operations of heat treatment in the middle of the drawing step and a final heat treatment after the end of the drawing step, wherein the temperature of the heat treatment right before the final heat treatment is 600° C. to 800° C. and the temperature of the final heat treatment is 300° C. to less than 600° C. 5. A method of production of bonding wire for semiconductor device use according to claim 3 , in which the method has a drawing step which performs one or more drawing operations, has, in the drawing step, at least one drawing operation which has a rate of reduction of area of 15.5% to 30.5%, and performs one or more operations of heat treatment in the middle of the drawing step and a final heat treatment after the end of the drawing step, wherein the temperature of the heat treatment right before the final heat treatment is 600° C. to 800° C. and the temperature of the final heat treatment is 300° C. to less than 600° C.

Assignees

Inventors

Classifications

  • Multilayered bond wires, e.g. having a coating concentric around a core · CPC title

  • comprising gold [Au] · CPC title

  • comprising copper [Cu] · CPC title

  • Thermally treating · CPC title

  • Changing the shapes of bond wires · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9536854B2 cover?
Bonding wire for semiconductor device use where both leaning failures and spring failures are suppressed by (1) in a cross-section containing the wire center and parallel to the wire longitudinal direction (wire center cross-section), there are no crystal grains with a ratio a/b of a long axis “a” and a short axis “b” of 10 or more and with an area of 15 μm 2 or more (“fiber texture”), (2) whe…
Who is the assignee on this patent?
Nippon Micrometal Corp, Nippon Steel & Sumikin Mat Co, Nippon Steel & Sumikin Mat Co
What technology area does this patent fall under?
Primary CPC classification C22C5/08. Mapped technology areas include Chemistry & Metallurgy.
When was this patent published?
Publication date Tue Jan 03 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).