Plasma method for reducing post-lithography line width roughness

Patent metadata

Field	Value
Publication number	US-9520298-B2
Application number	US-201514616672-A
Country	US
Kind code	B2
Filing date	Feb 7, 2015
Priority date	Feb 7, 2014
Publication date	Dec 13, 2016
Grant date	Dec 13, 2016

Abstract

The present disclosure is related to a method for treating a photoresist structure on a substrate, the method comprising producing one or more resist structures on a substrate, introducing the substrate in a plasma reactor, and subjecting the substrate to a plasma treatment at a temperature lower than zero degrees Celsius, such as between zero and −110° C. The plasma treatment may be a H 2 plasma treatment performed in an inductively coupled plasma reactor. The treatment time may be at least 30s.

First claim

The invention claimed is:

1. A method for treating a photoresist structure on a substrate, the method comprising:
producing one or more resist structures on a substrate;
introducing the substrate in a plasma reactor; and
subjecting the substrate to a plasma treatment at a temperature of zero degrees Celsius or lower, and for a duration between 60 s and 180 s, to thereby limit reflow of the one or more resist structures and to limit shrinkage of a critical dimension of the one or more resist structures to between 0% and 10%.

2. The method according to claim 1 , wherein the one or more resist structures are formed from a high resolution photoresist.

3. The method according to claim 1 , wherein the photoresist structure comprises a polymer backbone structure with or without functional groups.

4. The method according to claim 1 , wherein the one or more resist structures are parallel resist lines, and wherein the critical dimension of the lines is lower than or equal to 30nm.

5. The method according to claim 1 , wherein the plasma treatment consists of an H 2 plasma treatment.

6. The method according to claim 1 , wherein the plasma treatment takes place at a temperature between zero degrees Celsius and −110° C.

7. The method according to claim 6 , wherein the plasma treatment takes place at a temperature between −10° C. and −100° C.

8. The method according to claim 1 , wherein the substrate includes a semiconductor wafer or at least a semiconductor layer.

9. The method according to claim 1 , wherein the plasma treatment is followed by a plasma etching process that uses the one or more resist structures as a mask.

10. The method according to claim 1 , wherein the substrate is cooled to the temperature of zero degrees Celsius or lower, and is mounted on a cooled substrate chuck.

11. The method according to claim 1 , wherein the plasma reactor is an inductively coupled plasma reactor comprising a cylindrical coil, and wherein subjecting the substrate to the plasma treatment includes producing plasma in an area substantially defined by an interior of the coil.

12. The method according to claim 11 , wherein subjecting the substrate to the plasma treatment includes producing the plasma in the area substantially defined by the interior of the coil, such that a distance (d 1 ) between a core of the plasma and an upper surface of the substrate is between 15 cm and 25 cm.

13. The method according to claim 1 , wherein the plasma reactor is a Transformer Coupled Plasma reactor comprising a planar coil and a reaction window, and wherein plasma is produced in an area between the reaction window and an upper surface of the substrate.

14. The method according to claim 1 , wherein the plasma treatment produces a reduction of a Line Width Roughness of at least 7%.

15. The method according to claim 1 , wherein the plasma treatment limits shrinkage of the critical dimension of the one or more resist structures to between 2% and 8%, and produces a reduction of the Line Width Roughness of at least 7%.

16. The method according to claim 1 , wherein the one or more resist structures are formed from a high resolution photoresist, and wherein subjecting the substrate to a plasma treatment at a temperature of zero degrees Celsius or lower thereby limits reflow to substantially a layer at a surface of the one or more resist structures.

17. The method according to claim 1 , wherein the plasma treatment takes place at a temperature between −10° C. and −110° C., and wherein the pressure during the plasma treatment is between 2 mTorr and 50 mTorr.

Assignees

• Imec Vzw
• Univ Leuven Kath

Inventors

• De Schepper Peter
• De Marneffe Jean-Francois
• Altamirano Sanchez Efrain

Classifications

• H10P76/204 Primary

  of organic photoresist masks · CPC title

• H10P50/695 Primary

  characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask · CPC title

• H01L21/3086 Primary

  Electricity · mapped topic

• H01L21/0273

  Electricity · mapped topic