Silicon wafer and method of manufacturing thereof, and method of manufacturing semiconductor device

Patent metadata

Field	Value
Publication number	US-9502266-B2
Application number	US-201113576853-A
Country	US
Kind code	B2
Filing date	Feb 3, 2011
Priority date	Feb 8, 2010
Publication date	Nov 22, 2016
Grant date	Nov 22, 2016

Abstract

An object of the present invention is to provide an epitaxial wafer on which dislocation is preventable even when a LSA treatment is performed in device processes. An epitaxial wafer according to the present invention includes a wafer 11 whose nitrogen concentration is 1×10 12 atoms/cm 3 or more or whose specific resistance is 20 mΩ·cm or less by boron doping, and an epitaxial layer 12 provided on the wafer 11 . On the wafer 11 , if a thermal treatment is performed at 750° C. for 4 hours and then at 1,000° C. for 4 hours, polyhedron oxygen precipitates grow predominantly over plate-like oxygen precipitates. Therefore, in the device processes, plate-like oxygen precipitates cannot be easily formed. As a result, even when the LSA treatment is performed after various thermal histories in the device processes, it is possible to prevent the dislocation, which is triggered by oxygen precipitates, from generating.

First claim

What is claimed is:

1. A method of manufacturing an epitaxial wafer, the method comprising:
forming an epitaxial layer on a silicon wafer, in which a nitrogen concentration is 1×10 12 atoms/cm 3 or more or a specific resistance is 20 mΩ·cm or less by boron doping, to form the epitaxial wafer; and
heating the epitaxial wafer by raising a temperature of the epitaxial wafer to a predetermined temperature at a rate of 5 ° C. per minute or more within a temperature range from 800° C. to the predetermined temperature and keeping the predetermined temperature for 5minutes or more, the predetermined temperature being greater than or equal to 1,050° C. and less than or equal to a melting point of silicon,
wherein the epitaxial wafer is subjected to device processes including a LSA (Laser Spike Anneal) treatment after the heating.

2. The method of manufacturing the epitaxial wafer as claimed in claim 1 , wherein the LSA treatment is performed under a condition indicated by
T×S 2 ≦9×10 6

where an average value of diagonal lengths of plate-like oxygen precipitates contained in the silicon wafer with the epitaxial layer formed thereon is represented by S (nm), and a maximum temperature of the LSA treatment is represented by T (° C.).

3. The method of manufacturing the epitaxial wafer as claimed in claim 1 , the method further comprising:
growing a silicon single crystal in which an initial oxygen concentration is 14×10 17 atoms/cm 3 or less by means of a Czochralski method; and
obtaining the silicon wafer by cutting out from the silicon single crystal.

4. The method of manufacturing the epitaxial wafer as claimed in claim 3 , wherein the initial oxygen concentration is 12×10 17 atoms/cm 3 or less.

5. The method of manufacturing the epitaxial wafer as claimed in claim 4 , wherein
the device processes further include a thermal treatment to the epitaxial wafer with a temperature of 750° C. or more for 4 hours or more performed before the LSA treatment, the thermal treatment including a process in which the epitaxial wafer is kept at a temperature range of 1,000 to 1,050° C. for 2 hours or more.

6. A method of manufacturing a semiconductor device, the method comprising a wafer process of forming an epitaxial wafer, and a device process of forming the semiconductor device on the epitaxial wafer,
wherein the wafer process includes:
forming an epitaxial layer on a silicon wafer, in which a nitrogen concentration is 1×10 12 atoms/cm 3 or more or a specific resistance is 20 mΩ·cm or less by boron doping, to form the epitaxial wafer; and
heating the epitaxial wafer by raising a temperature of the epitaxial wafer to a predetermined temperature at a rate of 5° C. per minute or more within a temperature range from 800° C. to the predetermined temperature and keeping the predetermined temperature for 5 minutes or more, the predetermined temperature being greater than or equal to 1,050° C. and less than or equal to a melting point of silicon,
wherein the device process includes a LSA (Laser Spike Anneal) treatment performed under a condition indicated by
T×S 2 ≦9×10 6

where an average value of diagonal lengths of plate-like oxygen precipitates contained in the silicon wafer with the epitaxial layer formed thereon is represented by S (nm), and a maximum temperature of the LSA treatment is represented by T (° C.).

7. A method of manufacturing a semiconductor device, the method comprising:
forming an epitaxial layer on a silicon wafer to form an epitaxial wafer;
forming oxygen precipitate nuclei in the silicon wafer with the epitaxial layer formed thereon;
growing the oxygen precipitate nuclei to form larger amounts of polyhedron oxygen precipitates than plate-like oxygen precipitates; and
performing a LSA (Laser Spike Anneal) treatment after the growing,
wherein the forming of the oxygen precipitate nuclei is performed by heating the epitaxial wafer by raising a temperature of the epitaxial wafer to a predetermined temperature at a rate of 5° C. per minute or more within a temperature range from 800° C. to the predetermined temperature and keeping the predetermined temperature for 5 minutes or more, the predetermined temperature being greater than or equal to 1,050° C. and less than or equal to a melting point of silicon.

8. The method of manufacturing the semiconductor device as claimed in claim 7 ,
wherein the growing is performed by a thermal treatment to the epitaxial wafer with a temperature of 750° C. or more for 4 hours or more, the thermal treatment including a process in which the epitaxial wafer is kept at a temperature range of 1,000 to 1,050° C. for 2 hours or more.

9. The method of manufacturing the semiconductor device as claimed in claim 7 ,
wherein the LSA treatment is performed under a condition indicated by
T×S 2 ≦9×10 6

where an average value of diagonal lengths of plate-like oxygen precipitates contained in the silicon wafer with the epitaxial layer formed thereon is represented by S (nm), and a maximum temperature of the LSA treatment is represented by T (° C.).

10. A method of manufacturing a semiconductor device, the method comprising:
preparing a silicon wafer including a plurality of plate-like oxygen precipitates; and
performing a LSA (Laser Spike Anneal) treatment to the silicon wafer under a condition indicated by
T×S 2 9×10 6

where an average value of diagonal lengths of the plate-like oxygen precipitates is represented by S (nm), and a maximum temperature of the LSA treatment is represented by T (° C.).

11. The method of manufacturing the semiconductor device as claimed in claim 10 , wherein the silicon wafer has an epitaxial layer.

12. The method of manufacturing the semiconductor device as claimed in claim 10 , wherein the preparing the silicon wafer includes:
growing a silicon single crystal in which an initial oxygen concentration is 14×10 17 atoms/cm 3 or less by means of a Czochralski method; and
obtaining the silicon wafer by cutting out from the silicon single crystal.

13. The method of manufacturing the semiconductor device as claimed in claim 12 , wherein the initial oxygen concentration is 12×10 17 atoms/cm 3 or less.

14. The method of manufacturing the semiconductor device as claimed in claim 13 , the method further comprising:
performing a thermal treatment to the silicon wafer with a temperature of 750° C. or more for 4 hours or more before the LSA treatment, the thermal treatment including a process in which the silicon wafer is kept at a temperature range of 1,000 to 1,050° C. for 2 hours or more.

Assignees

• Ono Toshiaki
• Fujise Jun
• Sumco Corp

Inventors

• Ono Toshiaki
• Fujise Jun

Classifications

• H10P34/42

  with electromagnetic radiation, e.g. laser annealing (laser cutting H10P54/20) · CPC title

• H10P36/20 Primary

  Intrinsic gettering, i.e. thermally inducing defects by using oxygen present in the silicon body · CPC title

• H10P95/90

  Thermal treatments, e.g. annealing or sintering · CPC title

• H10P30/20 Primary

  into semiconductor materials, e.g. for doping · CPC title

• H01L21/268

  Electricity · mapped topic