Embedded architecture using resin coated copper

Patent metadata

Field	Value
Publication number	US-9451696-B2
Application number	US-201213631959-A
Country	US
Kind code	B2
Filing date	Sep 29, 2012
Priority date	Sep 29, 2012
Publication date	Sep 20, 2016
Grant date	Sep 20, 2016

Abstract

Electronic assemblies and methods for their manufacture are described, including those related to the formation of an assembly including a carrier and a resin coated copper layer positioned on the carrier. The resin coated copper layer includes a first layer comprising a resin and a second layer comprising copper, with the first layer bonded to the second layer. The first layer of the resin coated copper is positioned between the carrier and the second layer of the resin coated copper. An opening is formed in the second layer of the resin coated copper. A die is positioned in the opening. A plurality of dielectric layers and metal pathways are positioned on the second layer and on the die. Other embodiments are described and claimed.

First claim

What is claimed:

1. An assembly comprising:
a carrier structure;
a resin coated copper layer positioned on the carrier structure, the resin coated copper layer including a first layer comprising a resin and a second layer comprising copper, the first layer bonded to the second layer, the first layer positioned between the carrier structure and the second layer;
an opening extending through the second layer of the resin coated copper layer;
a die positioned in the opening, the die positioned on the first layer comprising a resin, the die including a first surface and a second surface opposite the first surface, the first surface positioned between the carrier structure and the second surface, the first surface defining a total first surface area, wherein the first layer comprising a resin is positioned between the first surface and the carrier structure across the total first surface area and
a plurality of dielectric layers and metal interconnections positioned on the second layer and on the die.

2. The assembly of claim 1 , wherein the carrier structure comprises:
a core;
a first metal layer on the core; and
a second metal layer on the first metal layer.

3. The assembly of claim 2 , wherein the first metal layer and the second metal layer each comprise copper.

4. The assembly of claim 2 , further comprising an adhesive layer positioned between the first metal layer and the second metal layer.

5. The assembly of claim 4 , the adhesive layer selected from the group consisting of an organic adhesive, a metal oxide adhesive, and a thermally releasing adhesive.

6. The assembly of claim 2 , wherein the core comprises a prepreg material.

7. The assembly of claim 2 , wherein the first metal layer is in direct contact with the second metal layer.

8. The assembly of claim 1 , wherein the resin comprises an epoxy.

9. The assembly of claim 1 , wherein the resin comprises an epoxy mixed with a non-epoxy filler material.

10. The assembly of claim 1 , wherein the opening does not extend through the first layer comprising a resin.

11. The assembly of claim 1 , wherein the die comprises a semiconductor material.

12. A method comprising:
providing a carrier structure;
positioning a resin coated copper layer on the carrier structure, the resin coated copper layer including a first layer comprising a resin and a second layer comprising copper, the first layer bonded to the second layer;
forming a plurality of contact pads on the second layer comprising copper;
forming a cavity extending through the second layer comprising copper, the cavity sized to accept a die;
positioning a die in the cavity on the first layer comprising a resin, wherein the first layer comprising a resin extends between the die and the carrier structure;
embedding the die in a dielectric material;
forming a plurality of dielectric layers and electrically conductive pathways on the dielectric material; and
separating the carrier structure and the first layer comprising a resin from the die.

13. The method of claim 12 , wherein the carrier structure includes a core, a first metal layer, and a second metal layer, wherein the first metal layer is positioned between the core and the second metal layer, and wherein the resin coated copper layer is positioned on the second metal layer with the first layer comprising a resin positioned between the second metal layer and the second layer comprising copper.

14. The method of claim 13 , wherein the core includes a prepreg material layer, and wherein the first metal layer is positioned between the prepreg material layer and the second metal layer.

15. The method of claim 13 , wherein the first metal layer and the second metal layer each comprise copper.

16. The method of claim 12 , wherein the positioning the die in the cavity comprises positioning a die comprising a semiconducting material in the cavity.

17. A method comprising:
providing a carrier structure;
positioning a resin coated copper layer on the carrier structure, the resin coated copper layer including a first layer comprising a resin and a second layer comprising copper, the first layer bonded to the second layer;
forming a plurality of contact pads on the second layer comprising copper;
forming a cavity in the second layer comprising copper, the cavity sized to accept a die, wherein the forming a cavity comprises etching through the second layer comprising copper of the resin coated copper layer, using the first layer comprising a resin as an etch stop layer;
positioning a die in the cavity, the positioning the die in the cavity comprising positioning the die on the first layer comprising a resin, wherein the first layer comprising a resin extends between the die and the carrier structure;
embedding the die in a dielectric layer;
forming a plurality of additional dielectric layers and electrically conductive pathways on the dielectric layer; and
separating the carrier structure and the first layer comprising a resin from the die.

18. The method of claim 17 , the providing a carrier structure comprises providing a first metal layer on a core material and providing a second metal layer on the first metal layer, wherein the first metal layer is positioned between the core material and the second metal layer.

19. The method of claim 18 , wherein the providing a carrier structure further comprises providing an adhesive layer between the first metal layer and the second metal layer.

20. The method of claim 18 , further comprising, after the positioning the resin coated copper layer on the carrier structure, and prior to the forming a plurality of contact pads on the second layer comprising copper, performing a hot press operation to laminate a plurality of the layers.

Assignees

• Seneviratne Dilan
• Shen Ching-Ping J
• Jin Liwen
• Arora Deepak
• Raghunathan Vinodhkumar
• Intel Corp

Inventors

• Seneviratne Dilan
• Shen Ching-Ping J
• Jin Liwen
• Arora Deepak
• Raghunathan Vinodhkumar

Classifications

• H05K2203/308

  Sacrificial means, e.g. for temporarily filling a space for making a via or a cavity or for making rigid-flexible PCBs · CPC title

• H05K2203/0152

  Temporary metallic carrier, e.g. for transferring material · CPC title

• H05K2203/0384

  Etch stop layer, i.e. a buried barrier layer for preventing etching of layers under the etch stop layer · CPC title

• H05K3/4682

  Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil · CPC title

• H05K2203/0369

  Etching selective parts of a metal substrate through part of its thickness, e.g. using etch resist · CPC title