Device mounting board and semiconductor power module

US9439285B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9439285-B2
Application numberUS-201314092054-A
CountryUS
Kind codeB2
Filing dateNov 27, 2013
Priority dateJul 29, 2011
Publication dateSep 6, 2016
Grant dateSep 6, 2016

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

In the upper surface of a metallic substrate, a region near the central part of the metallic substrate is surrounded by a rectangle having dotted sides electrically separate the interior and exterior of the rectangle. Each dot of the sides is formed of a pillared insulating resin that penetrates from the upper surface to the lower surface of the metallic substrate. Oxide films are so formed as to fill in the spaces between adjacent cylinders of insulating resins and the surrounding of the cylinders. That is, a separation layer is formed of the pillared insulating resins and the oxide films that fill up the spaces between the pillared insulating resins as well as their vicinities.

First claim

Opening claim text (preview).

What is claimed is: 1. A device mounting board comprising a metallic substrate which has a first face and a second face opposed to the first face, the metallic substrate including: a plurality of through-holes each extending from the first face to the second face; and a metallic oxide region existing entirely between each adjacent two of the plurality of through-holes, for electrically isolating the metallic substrate into at least two metallic regions, wherein the metallic oxide region extends from one edge of the metallic substrate when viewed from a direction perpendicular to the first face. 2. The device mounting board according to claim 1 , further comprising: a metallic oxide film covering the first face of the metallic substrate, wherein the metallic oxide film contains a same metallic oxide as that of the metallic oxide region. 3. The device mounting board according to claim 1 , wherein the metallic substrate further includes a plurality of insulative resins which fill in the plurality of through-holes. 4. The device mounting board according to claim 2 , wherein the metallic substrate further includes a plurality of insulative resins which fill in the plurality of through-holes. 5. The device mounting board according to claim 1 , wherein the metallic oxide region has a polygonal ring shape or a curved ring shape when viewed from a direction perpendicular to the first face. 6. The device mounting board according to claim 1 , wherein each of the plurality of through-holes has an elliptical opening of which a major axis coincides with a direction along which the plurality of through-holes are arranged. 7. The device mounting board according to claim 1 , wherein each of the plurality of through-holes has an elliptical opening of which a major axis is inclined to a direction along which the plurality of through-holes are arranged. 8. The device mounting board according to claim 1 , wherein the plurality of through-holes are meanderingly arranged. 9. The device mounting board according to claim 1 , wherein the metallic oxide region contains a same metal element as that of the at least two metallic regions. 10. A semiconductor power module comprising: a device mounting board which includes a metallic substrate having a first face and a second face opposed to the first face, an insulative film disposed on the first face of the metallic substrate, and a wiring region disposed on the insulative film, wherein the metallic substrate includes a plurality of through-holes each extending from the first face to the second face, and a metallic oxide region existing entirely between each adjacent two of the plurality of through-holes, for electrically isolating the metallic substrate into at least two metallic regions; a power device mounted on one of the at least two metallic regions of the metallic substrate, and a controller mounted on another of the at least two metallic regions of the metallic substrate. 11. A device mounting board comprising a metallic substrate which has a first face and a second face opposed to the first face, the metallic substrate including: a plurality of through-holes each extending from the first face to the second face; and a metallic oxide region existing entirely between each adjacent two of the plurality of through-holes, for electrically isolating the metallic substrate into at least two metallic regions; an insulative film disposed on the first face of the metallic substrate; and a wiring region disposed on the insulative film. 12. The device mounting board according to claim 11 , further comprising: a metallic oxide film covering the first face of the metallic substrate, wherein the metallic oxide film contains a same metallic oxide as that of the metallic oxide region. 13. The device mounting board according to claim 11 , wherein the metallic substrate further includes a plurality of insulative resins which fill in the plurality of through-holes. 14. The device mounting board according to claim 12 , wherein the metallic substrate further includes a plurality of insulative resins which fill in the plurality of through-holes. 15. The device mounting board according to claim 11 , wherein the metallic oxide region has a polygonal ring shape or a curved ring shape when viewed from a direction perpendicular to the first face. 16. The device mounting board according to claim 14 , wherein each of the plurality of through-holes has an elliptical opening of which a major axis coincides with a direction along which the plurality of through-holes are arranged. 17. The device mounting board according to claim 11 , wherein each of the plurality of through-holes has an elliptical opening of which a major axis is inclined to a direction along which the plurality of through-holes are arranged. 18. The device mounting board according to claim 11 , wherein the plurality of through-holes are meanderingly arranged. 19. The device mounting board according to claim 11 , wherein the metallic oxide region contains a same metal element as that of the at least two metallic regions.

Assignees

Inventors

Classifications

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • multiple bond wires connected to a common bond pad · CPC title

  • Package configurations · CPC title

  • being on a metallic substrate, e.g. insulated metal substrates [IMS] · CPC title

  • Shapes or dispositions thereof · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9439285B2 cover?
In the upper surface of a metallic substrate, a region near the central part of the metallic substrate is surrounded by a rectangle having dotted sides electrically separate the interior and exterior of the rectangle. Each dot of the sides is formed of a pillared insulating resin that penetrates from the upper surface to the lower surface of the metallic substrate. Oxide films are so formed as …
Who is the assignee on this patent?
Sanyo Electric Co, Panasonic Ip Man Co Ltd
What technology area does this patent fall under?
Primary CPC classification H05K1/053. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 06 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).