Method for manufacturing printed wiring board

Patent metadata

Field	Value
Publication number	US-9420697-B2
Application number	US-201213536056-A
Country	US
Kind code	B2
Filing date	Jun 28, 2012
Priority date	Sep 9, 2011
Publication date	Aug 16, 2016
Grant date	Aug 16, 2016

Abstract

A method for manufacturing a printed wiring board includes forming an interlayer insulation layer on a conductive circuit, applying laser to a portion of the interlayer insulation layer such that an opening reaching to the conductive circuit is formed for a via conductor, subjecting the opening to a plasma treatment using a processing gas which includes a reactive gas including a fluorovinyl ether gas having a double bond of two carbon atoms and a fluoroalkyl ether group, forming an upper conductive circuit on the interlayer insulation layer, and forming a via conductor in the opening such that the via conductor connects the conductive circuit and the upper conductive circuit.

First claim

What is claimed is:

1. A method for manufacturing a printed wiring board, comprising:
forming an interlayer insulation layer on a conductive circuit;
applying laser to a portion of the interlayer insulation layer such that an opening reaching to the conductive circuit is formed for a via conductor;
subjecting the opening to a plasma treatment using a processing gas which includes a reactive gas comprising a fluorovinyl ether gas having a double bond of two carbon atoms and a fluoroalkyl ether group;
forming an upper conductive circuit on the interlayer insulation layer; and
forming a via conductor in the opening such that the via conductor connects the conductive circuit and the upper conductive circuit,
wherein the plasma treatment is a 60-Hz non-equilibrium plasma treatment under an atmospheric pressure, and the reactive gas is at least one of trifluorovinyl(pentafluoroallyl) ether and decafluoro-3-oxa-1,6-heptadiene.

2. The method for manufacturing a printed wiring board according to claim 1 , wherein the subjecting of the opening to the plasma treatment includes cleaning a surface portion of the conductive circuit at a bottom of the opening.

3. The method for manufacturing a printed wiring board according to claim 1 , wherein the processing gas further includes at least one of O 2 , Ar, He and N 2 .

4. The method for manufacturing a printed wiring board according to claim 1 , wherein the interlayer insulation layer includes a silica filler in an amount of 30% or greater in the interlayer insulation layer.

5. The method for manufacturing a printed wiring board according to claim 1 , wherein the via conductor is formed such that the via conductor has a diameter which is set at 50 μm or smaller.

6. The method for manufacturing a printed wiring board according to claim 1 , further comprising detecting an emission intensity of one of CF 2 radical and CF 3 radical in a wavelength range of 200 nm to 290 nm during the subjecting of the opening to the plasma treatment.

7. The method for manufacturing a printed wiring board according to claim 1 , further comprising detecting an emission intensity of one of CF 2 radical and CF 3 radical in a wavelength range of 200 nm to 290 nm through an emission spectro-photometric analysis during the subjecting of the opening to the plasma treatment.

8. The method for manufacturing a printed wiring board according to claim 6 , wherein the emission intensity is at least three times an emission intensity of a gas containing only argon gas.

9. The method for manufacturing a printed wiring board according to claim 1 , further comprising detecting emission intensities of CF 2 radical and CF 3 radical in a wavelength range of 200 nm to 290 nm during the subjecting of the opening to the plasma treatment.

10. The method for manufacturing a printed wiring board according to claim 1 , further comprising detecting emission intensities of CF 2 radical and CF 3 radical in a wavelength range of 200 nm to 290 nm through an emission spectro-photometric analysis during the subjecting of the opening to the plasma treatment.

11. The method for manufacturing a printed wiring board according to claim 1 , wherein the processing gas includes O 2 in an amount of from 0.1% to 2% in the processing gas.

12. The method for manufacturing a printed wiring board according to claim 1 , wherein the interlayer insulation layer includes inorganic particles.

13. The method for manufacturing a printed wiring board according to claim 1 , wherein the interlayer insulation layer includes inorganic particles in an amount of from 30 wt. % to 80 wt. %.

14. The method for manufacturing a printed wiring board according to claim 11 , wherein the reactive gas in the processing gas is in an amount of from 0.5 vol. % to 5 vol. %.

15. The method for manufacturing a printed wiring board according to claim 1 , wherein the reactive gas in the processing gas is in an amount of from 0.5 vol. % to 5 vol. %.

16. The method for manufacturing a printed wiring board according to claim 1 , further comprising adjusting a mixing ratio of the processing gas, wherein the processing gas includes O 2 in an amount of from 0.1% to 2% in the processing gas.

17. The method for manufacturing a printed wiring board according to claim 1 , further comprising:
detecting an emission intensity of one of CF 2 radical and CF 3 radical in a wavelength range of 200 nm to 290 nm during the subjecting of the opening to the plasma treatment; and
adjusting a mixing ratio of the processing gas such that the emission intensity is at least three times an emission intensity of a gas containing only argon gas,
wherein the processing gas includes O 2 in an amount of from 0.1% to 2% in the processing gas.

18. The method for manufacturing a printed wiring board according to claim 1 , wherein the forming of the upper conductive circuit and the forming of the via conductor comprise forming an electrolytic plated film forming the upper conductive circuit and filling the opening with an electrolytic plating material forming the via conductor.

19. The method for manufacturing a printed wiring board according to claim 14 , wherein the subjecting of the opening to the plasma treatment includes cleaning a surface portion of the conductive circuit at a bottom of the opening.

20. The method for manufacturing a printed wiring board according to claim 15 , wherein the subjecting of the opening to the plasma treatment includes cleaning a surface portion of the conductive circuit at a bottom of the opening.

Assignees

• Iwata Yoshiyuki
• Hori Masaru
• Sakamoto Hajime
• Ibiden Co Ltd
• Nat Univ Corp Nagoya Univ

Inventors

• Iwata Yoshiyuki
• Hori Masaru
• Sakamoto Hajime

Classifications

• H05K2203/095

  Plasma, e.g. for treating a substrate to improve adhesion with a conductor or for cleaning holes · CPC title

• H05K3/421 Primary

  Blind plated via connections (H05K3/422, H05K3/423 and H05K3/425 take precedence) · CPC title

• H05K3/0035

  of blind holes, i.e. having a metal layer at the bottom · CPC title

• H05K3/0055 Primary

  After-treatment, e.g. cleaning or desmearing of holes · CPC title

• H05K3/027 Primary

  the conductive material being removed by irradiation, e.g. by photons, alpha or beta particles · CPC title