Phase-change device, related manufacturing method, and related electronic device

Patent metadata

Field	Value
Publication number	US-9419054-B2
Application number	US-201514614099-A
Country	US
Kind code	B2
Filing date	Feb 4, 2015
Priority date	May 15, 2014
Publication date	Aug 16, 2016
Grant date	Aug 16, 2016

Abstract

A method for manufacturing a phase-change device may include the following steps: preparing a substrate; preparing a first dielectric layer, which may be positioned on the substrate; preparing a first electrode, which may be positioned in the first dielectric layer; forming a phase-change material layer, which may overlap the first electrode; processing (e.g., etching) the phase-change material layer to form a phase-change member, which may be electrically connected to the first electrode; forming an etch-stop layer, which may overlap and/or cover the phase-change member; forming an intermediary layer, which may be positioned on the etch-stop layer; forming a second dielectric layer, which may be positioned on the intermediary layer; and forming a second electrode, which may extend through the second dielectric layer, the intermediary layer, and the etch-stop layer and may be electrically connected to the phase-change member.

First claim

What is claimed is:

1. A method for manufacturing a phase-change device, the method comprising:
providing a substrate;
forming a first dielectric layer on the substrate;
forming a first electrode in the first dielectric layer;
forming a phase-change material layer overlapping the first electrode;
forming a protective material layer on the phase-change material layer;
processing the phase-change material layer to form a phase-change member and processing the protective material layer to form a protective layer that contacts a top surface of the phase-change member;
forming an etch-stop layer that covers a top surface of the protective layer and side surfaces of the phase-change member;
forming an intermediary layer on the etch-stop layer;
forming a second dielectric layer on the intermediary layer; and
forming a second electrode that extends through the second dielectric layer, the intermediary layer, and the etch-stop layer, wherein the second electrode is electrically connected to the phase-change member via the protective layer without directly contacting the phase-change member.

2. The method of claim 1 , wherein the etch-stop layer contacts two opposite sides of the phase-change member.

3. The method of claim 1 , wherein a portion of the etch-stop layer overlaps a top side of the phase-change member in a direction perpendicular to a bottom surface of the substrate, wherein the second electrode is formed after the portion of the etch-stop layer has been removed.

4. The method of claim 3 , wherein the portion of the etch-stop layer is spaced from the phase-change member.

5. The method of claim 1 , wherein the etch-stop layer is formed of silicon nitride.

6. The method of claim 1 , wherein the intermediary layer is formed of a silicon oxide material.

7. The method of claim 1 , wherein the second dielectric layer is formed of at least one of an undoped silicate glass material and a fluorine-doped silica glass material.

8. The method of claim 1 ,
wherein the protective layer is formed of a conductive material.

9. The method of claim 8 , wherein the protective layer is formed of titanium nitride.

10. The method of claim 8 , wherein the etch-stop layer contacts two opposite sides of the protective layer.

11. The method of claim 8 , wherein a portion of the etch-stop layer contacts a top side of the protective layer, wherein the second electrode is formed after the portion of the etch-stop layer has been removed.

12. The method of claim 1 , wherein a first etching process is performed to form a first hole through the second dielectric layer and the intermediary layer, and wherein a second etching process is performed to form a second hole through the etch-stop layer, and wherein the second electrode is formed in a combination of the first hole and the second hole.

Assignees

• Semiconductor Mfg Int Shanghai Corp

Inventors

• Li Ying
• Chan Yipeng
• Wang Lei

Classifications

• H10P50/00

  Etching of wafers, substrates or parts of devices · CPC title

• H01L45/1675

  Electricity · mapped topic

• H01L45/144

  Electricity · mapped topic

• H01L27/2436 Primary

  Electricity · mapped topic

• H01L21/306

  Electricity · mapped topic