Photodiode insulation structure

Patent metadata

Field	Value
Publication number	US-9419039-B2
Application number	US-201514644795-A
Country	US
Kind code	B2
Filing date	Mar 11, 2015
Priority date	Mar 25, 2014
Publication date	Aug 16, 2016
Grant date	Aug 16, 2016

Abstract

A structure of insulation between photodiodes formed in a doped semiconductor layer of a first conductivity type extending on a doped semiconductor substrate of the second conductivity type, the insulating structure including a trench crossing the semiconductor layer, the trench walls being coated with an insulating layer, the trench being filled with a conductive material and being surrounded with a P-doped area, more heavily doped than the semiconductor layer.

First claim

What is claimed is:

1. A structure, comprising:
photodiodes formed in a first semiconductor layer of a first conductivity type;
a doped semiconductor substrate of the second conductivity type, the first semiconductor layer extending on the semiconductor substrate;
an insulating structure formed in a trench crossing the first semiconductor layer, the trench having walls, the insulating structure including:
a first insulating layer coating the walls of the trench;
a conductive material filling the trench; and
a doped area of the second conductivity type surrounding the trench, the doped area being more heavily doped than the first semiconductor layer; and

a contact electrically coupled with the conductive material and a zero bias voltage terminal, wherein the photodiodes include a second semiconductor layer positioned on the first semiconductor layer such that the first semiconductor layer is positioned between the semiconductor substrate and the second semiconductor layer, the second semiconductor layer being more heavily doped than the semiconductor substrate, and the doped area extending between and contacting the second semiconductor layer and the first insulating layer.

2. The structure of claim 1 , wherein the first insulating layer has a thickness greater than 25 nm.

3. The structure of claim 1 , wherein the first insulating layer comprises a thermal oxide layer, a deposited oxide layer, and a silicon nitride layer.

4. The structure of claim 1 , wherein the conductive material is doped polysilicon.

5. The structure of claim 1 , wherein the first conductivity type is type N.

6. The structure of claim 1 , wherein the doped area extends in the substrate and forms the walls and a bottom of the trench.

7. The structure of claim 1 , further comprising a second insulating layer positioned on the first semiconductor layer and the doped area, the trench extending through the second insulating layer, and the first insulating layer coating a sidewall of the second insulating layer.

8. The structure of claim 1 , wherein the trench extends completely through the first semiconductor layer and into a portion of the semiconductor substrate, the portion being directly below the first semiconductor layer.

9. A structure, comprising:
a first semiconductor layer of a first conductivity type;
a doped semiconductor substrate of the second conductivity type, the first semiconductor layer extending on the semiconductor substrate;
an insulating structure formed in a trench crossing the first semiconductor layer, the trench having walls, the insulating structure including:
a first insulating layer coating the walls of the trench;
a conductive material filling the trench; and
a doped area of the second conductivity type forming the walls of the trench, the doped area being more heavily doped than the first semiconductor layer; and

a contact electrically coupled with the conductive material and a zero bias voltage terminal, wherein the structure includes a second semiconductor layer positioned on the first semiconductor layer such that the first semiconductor layer is positioned between the semiconductor substrate and the second semiconductor layer, the second semiconductor layer being more heavily doped than the semiconductor substrate, and the doped area extending between and contacting the second semiconductor layer and the first insulating layer.

10. The structure of claim 9 , wherein the first insulating layer comprises a thermal oxide layer, a deposited oxide layer, and a silicon nitride layer.

11. The structure of claim 9 , wherein the conductive material is doped polysilicon.

12. The structure of claim 9 , wherein the first conductivity type is type N.

13. The structure of claim 9 , wherein the doped area extends in the substrate and forms the walls and a bottom of the trench.

14. The structure of claim 9 , further comprising a second insulating layer positioned on the first semiconductor layer and the doped area, the trench extending through the second insulating layer, and the first insulating layer coating a sidewall of the second insulating layer.

15. The structure of claim 9 , wherein the trench extends completely through the first semiconductor layer and into a portion of the semiconductor substrate, the portion being directly below the first semiconductor layer.

16. A structure, comprising:
a first semiconductor layer of a first conductivity type;
a photodiode positioned in the first semiconductor layer;
a semiconductor substrate of the second conductivity type, the first semiconductor layer extending on the semiconductor substrate; and
an insulating structure formed in a trench extending through the first semiconductor layer and into the semiconductor substrate, the trench having walls, the insulating structure including:
a first insulating layer coating the walls of the trench;
a conductive material filling the trench; and
a doped area of the second conductivity type surrounding the trench, the doped area being more heavily doped than the first semiconductor layer, wherein the photodiode includes a second semiconductor layer positioned on the first semiconductor layer such that the first semiconductor layer is positioned between the semiconductor substrate and the second semiconductor layer, the second semiconductor layer being more heavily doped than the semiconductor substrate, and the doped area extending between and contacting the second semiconductor layer and the first insulating layer.

17. The structure of claim 16 , further comprising a contact electrically coupled with the conductive material and a zero bias voltage terminal.

18. The structure of claim 16 , wherein the doped area extends in the substrate and forms the walls and a bottom of the trench.

19. The structure of claim 16 , further comprising a second insulating layer positioned on the first semiconductor layer and the doped area, the trench extending through the second insulating layer, and the first insulating layer coating a sidewall of the second insulating layer.

Assignees

• St Microelectronics Crolles 2 Sas

Inventors

• Ahmed Nayera
• Roy Francois

Classifications

• H10F39/028

  performed after manufacture of the image sensors, e.g. annealing, gettering of impurities, short-circuit elimination or recrystallisation · CPC title

• H10F39/024

  of coatings or optical elements · CPC title

• H10F39/18

  Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors · CPC title

• H10F39/014

  of CMOS image sensors · CPC title

• H10F39/807 Primary

  Pixel isolation structures · CPC title