Wafer processing method

US9418908B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9418908-B2
Application numberUS-201514811470-A
CountryUS
Kind codeB2
Filing dateJul 28, 2015
Priority dateJul 30, 2014
Publication dateAug 16, 2016
Grant dateAug 16, 2016

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A wafer processing method includes a first correction step of measuring a distance “a” between a first cut groove previously formed by a first cutting unit and a division line for the next cut groove, and correcting an actual index amount by using a deviation “b” of the first cutting unit equivalent to the difference between the distance “a” and a proper index amount of the first cutting unit, and a second correction step of forming a measurement groove by using a second cutting unit along the division line for the next cut groove, measuring a distance “c” between the first cut groove and the measurement groove, and correcting an actual index amount of the second cutting unit by using a deviation “d” equivalent to the difference between the distance “c” and a proper index amount of the second cutting unit during the cutting step.

First claim

Opening claim text (preview).

What is claimed is: 1. A wafer processing method for cutting a wafer by using a cutting apparatus, the front side of the wafer being partitioned by a plurality of crossing division lines into a plurality of separate regions where a plurality of devices are respectively formed, the cutting apparatus including: a holding table configured to hold the wafer, first cutting means having a first cutting blade for cutting the wafer held on the holding table, second cutting means having a second cutting blade for cutting the wafer held on the holding table, wherein the second cutting blade has a thickness that is different from that of the first cutting blade, feeding means for feeding the holding table in an X direction, indexing means for indexing the first cutting means and the second cutting means in a Y direction perpendicular to the X direction according to the pitch of the division lines, and imaging means for detecting a target area of the wafer to be cut, the wafer processing method comprising: an alignment step of identifying the target area of the wafer held on the holding table by using the imaging means; a cutting step of repeating a cutting operation by the first cutting means and the second cutting means with the feeding means and an indexing operation by the indexing means according to the pitch of the division lines after performing the alignment step, thereby forming a first cut groove of a first width along each division line by using the first cutting means and forming a second cut groove of a second width along the first cut groove by using the second cutting, wherein the first width is different from the second width; a first cutting means correction step of measuring a distance “a” between the first cut groove previously formed and each division line where the first cut groove is to be next formed, and correcting an actual index amount of the first cutting means by using a deviation “b” of the first cutting means equivalent to the difference between the distance “a” and a proper index amount of the first cutting means during the cutting step; and a second cutting means correction step of forming a measurement groove by using the second cutting means along each division line where the first cut groove is to be next formed, measuring a distance “c” between the first cut groove previously formed and the measurement groove, and correcting an actual index amount of the second cutting means by using a deviation “d” of the second cutting means equivalent to the difference between the distance “c” and a proper index amount of the second cutting means during the cutting step. 2. The wafer processing method according to claim 1 , wherein the measurement groove is formed at only a peripheral portion of the wafer in the second cutting means correction step. 3. A wafer processing method for cutting a wafer by using a cutting apparatus, the front side of the wafer being partitioned by a plurality of crossing division lines into a plurality of separate regions where a plurality of devices are respectively formed, the cutting apparatus including: a holding table configured to hold the wafer, first cutting means having a first cutting blade for cutting the wafer held on the holding table, second cutting means having a second cutting blade for cutting the wafer held on the holding table, feeding means for feeding the holding table in an X direction, indexing means for indexing the first cutting means and the second cutting means in a Y direction perpendicular to the X direction according to the pitch of the division lines, and imaging means for detecting a target area of the wafer to be cut, the wafer processing method comprising: an alignment step of identifying the target area of the wafer held on the holding table by using the imaging means; a cutting step of repeating a cutting operation by the first cutting means and the second cutting means with the feeding means and an indexing operation by the indexing means according to the pitch of the division lines after performing the alignment step, thereby forming a first cut groove along each division line by using the first cutting means and forming a second cut groove along the first cut groove by using the second cutting means; a first cutting means correction step of measuring a distance “a” between the first cut groove previously formed and each division line where the first cut groove is to be next formed, and correcting an actual index amount of the first cutting means by using a deviation “b” of the first cutting means equivalent to the difference between the distance “a” and a proper index amount of the first cutting means during the cutting step; and a second cutting means correction step of forming a measurement groove by using the second cutting means along each division line where the first cut groove is to be next formed, measuring a distance “c” between the first cut groove previously formed and the measurement groove, and correcting an actual index amount of the second cutting means by using a deviation “d” of the second cutting means equivalent to the difference between the distance “c” and a proper index amount of the second cutting means during the cutting step, wherein the wafer is a package wafer composed of a base wafer and a resin layer sealing the front side of the base wafer in an area except a peripheral portion, the division lines being partially exposed in the peripheral portion of the base wafer so that the division lines can be imaged by the imaging means. 4. The wafer processing method according to claim 1 , wherein the first width of the first cut grove is greater than the second width of the second cut groove. 5. The wafer processing method according to claim 3 , wherein a first width of the first cut grove is greater than a second width of the second cut groove.

Assignees

Inventors

Classifications

  • Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

  • Cutting or separating of wafers, substrates or parts of devices · CPC title

  • Grinding, lapping or polishing of wafers, substrates or parts of devices · CPC title

  • H10P74/23Primary

    characterised by multiple measurements, corrections, marking or sorting processes · CPC title

  • Electricity · mapped topic

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What does patent US9418908B2 cover?
A wafer processing method includes a first correction step of measuring a distance “a” between a first cut groove previously formed by a first cutting unit and a division line for the next cut groove, and correcting an actual index amount by using a deviation “b” of the first cutting unit equivalent to the difference between the distance “a” and a proper index amount of the first cutting unit, …
Who is the assignee on this patent?
Disco Corp
What technology area does this patent fall under?
Primary CPC classification H10P74/23. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 16 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).