Magnetic multilayer structure

Patent metadata

Field	Value
Publication number	US-9384879-B2
Application number	US-201414155552-A
Country	US
Kind code	B2
Filing date	Jan 15, 2014
Priority date	Jan 15, 2014
Publication date	Jul 5, 2016
Grant date	Jul 5, 2016

Abstract

A mechanism is provided for an integrated laminated magnetic device. A substrate and a multilayer stack structure form the device. The multilayer stack structure includes alternating magnetic layers and diode structures formed on the substrate. Each magnetic layer in the multilayer stack structure is separated from another magnetic layer in the multilayer stack structure by a diode structure.

First claim

What is claimed is:

1. A method for fabricating an integrated laminated magnetic device, comprising:
providing a substrate;
forming a multilayer stack structure on the substrate, the multilayer stack structure including alternating magnetic layers and diode structures formed on the substrate;
wherein each magnetic layer in the multilayer stack structure is separated from another magnetic layer in the multilayer stack structure by a diode structure;
wherein the multilayer stack structure comprises a first magnetic layer disposed on the substrate, the diode structure disposed directly on top of the first magnetic layer, a second magnetic layer disposed directly on top of the diode structure, another diode structure disposed directly on top of the second magnetic layer, another first magnetic layer disposed directly on top of the another diode structure.

2. The method of claim 1 , wherein the multilayer stack structure comprises repeated sandwiches of two of the magnetic layers having the diode structure interposed in between.

3. The method of claim 1 , further comprising providing a planar multi-turn coil structure such that the multilayer stack structure surrounds a portion of the planar multi-turn coil structure.

4. The method of claim 1 , wherein the magnetic layers are disposed to form the multilayer stack structure by electroplating.

5. The method of claim 1 , wherein the diode structures are disposed to form the multilayer stack structure by electroplating.

6. The method of claim 1 , wherein the diode structures are forwarded bias in a same direction in the multilayer stack structure;
wherein the same direction is a forward bias direction.

7. The method of claim 6 , wherein an electrical eddy current in the multilayer stack structure is inhibited from flowing in a reverse bias direction between the each magnetic layer and the another magnetic layer.

8. The method of claim 6 , wherein the diode structures in the multilayer stack structure each comprise a p-type material having positive charge carriers and an n-type material having negative charge carriers.

Assignees

• IBM

Inventors

• Herget Philipp
• O'Sullivan Eugene J
• Romankiw Lubomyr T
• Wang Naigang
• Webb Bucknell C

Classifications

• H10D84/60

  characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs (H10D84/40 takes precedence) · CPC title

• H10D1/20 Primary

  Inductors · CPC title

• H01L28/10

  Electricity · mapped topic

• H01F7/021 Primary

  Construction of PM (H01F7/0278 takes precedence; PM compositions H01F1/032) · CPC title

• H01L27/0641

  Electricity · mapped topic