Electroplating method

Patent metadata

Field	Value
Publication number	US-9376758-B2
Application number	US-201113311020-A
Country	US
Kind code	B2
Filing date	Dec 5, 2011
Priority date	Dec 21, 2010
Publication date	Jun 28, 2016
Grant date	Jun 28, 2016

Abstract

An electroplating method can securely and efficiently fill a plated metal into deep high-aspect ratio vias in a bottom-up manner without producing defects in the plated metal. The electroplating method includes: immersing a substrate, having vias formed in a surface, and an anode in a plating solution in a plating tank, the anode being disposed opposite the surface of the substrate; and intermittently passing a plating current at a constant current value between the substrate and the anode in such a manner that the supply and the stop of the plating current are repeated, and that the proportion of a current supply time during which the plating current is supplied increases with the progress of plating, thereby filling a plated metal into the vias.

First claim

What is claimed is:

1. An electroplating method comprising:
immersing a substrate, having vias formed in a surface, and an anode in a plating solution in a plating tank, the anode being disposed opposite the surface of the substrate, and the plating solution containing an additive therein; and
intermittently passing a plating current at a constant current value between the substrate and the anode in such a manner that only a supply of the plating current and a stop of the plating current are repeated, the stop being such that no current is passed between the substrate and the anode, and such that the proportion of a current supply time during which the plating current is supplied at the constant current value increases with the progress of plating, thereby filling a plated metal into the vias;
wherein the constant current value of the plating current is maintained at a current value such that a current density at the anode is in a range for suppressing a consumption of the additive.

2. The electroplating method according to claim 1 , wherein a current stop time during which the supply of the plating current is intermittently stopped decreases with the progress of plating.

3. The electroplating method according to claim 2 , wherein a current supply pitch, at which the supply and the stop of the plating current are intermittently repeated is constant while the plating current is passed between said substrate and said anode.

4. The electroplating method according to claim 1 , wherein the current supply time is constant while the plating current is passed between said substrate and said anode.

5. The electroplating method according to claim 1 , wherein the current supply time during which the plating current is continuously passed increases with the progress of plating while the plating current is passed between said substrate and said anode.

6. The electroplating method according to claim 5 , wherein a current stop time during which the supply of the plating current is intermittently stopped is constant with the progress of plating.

7. The electroplating method according to claim 5 , wherein a current supply pitch, at which the supply and the stop of the plating current are intermittently repeated is constant while the plating current is passed between said substrate and said anode.

8. The electroplating method according to claim 1 , wherein a current supply pitch, at which the supply and the stop of the plating current are intermittently repeated is constant while the plating current is passed between said substrate and said anode.

Assignees

• Yasuda Shingo
• Kuriyama Fumio
• Shimoyama Masashi
• Nagai Mizuki
• Tamari Yusuke
• Ebara Corp

Inventors

• Yasuda Shingo
• Kuriyama Fumio
• Shimoyama Masashi
• Nagai Mizuki
• Tamari Yusuke

Classifications

• C25D5/18 Primary

  Electroplating using modulated, pulsed or reversing current · CPC title

• C25D7/123

  Semiconductors first coated with a seed layer or a conductive layer · CPC title

• H10W20/0245

  comprising use of blind vias during the manufacture · CPC title

• H10W20/0261

  characterised by the filling method or the material of the conductive fill · CPC title

• H10W20/023

  the interconnections being through-semiconductor vias · CPC title