IO driver impedance calibration

Patent metadata

Field	Value
Publication number	US-9356600-B2
Application number	US-201214400743-A
Country	US
Kind code	B2
Filing date	May 30, 2012
Priority date	May 30, 2012
Publication date	May 31, 2016
Grant date	May 31, 2016

Abstract

An IO driver for an integrated circuit and a method for calibrating such an IO driver are provided. The IO driver comprises a plurality of IO driver cells, a plurality of IO partial driver cells and an external resistor. The IO driver cells control IO operations for a corresponding plurality of data channels of the integrated circuit. The IO partial driver cells are coupled to respective cells of the plurality of IO driver cells. The external resistor provides a reference impedance. The reference partial driver cell is coupled to the external resistor and is arranged to determine the reference impedance and to provide information depending on the reference impedance to the IO partial driver cells. The IO partial driver cells are arranged to calibrate the respective IO driver cells based on the provided information.

First claim

The invention claimed is:

1. An IO driver for an integrated circuit, the IO driver comprising:
a plurality of IO driver cells for controlling IO operations for a corresponding plurality of data channels of the integrated circuit;
a plurality of IO partial driver cells, respectively coupled to the plurality of IO driver cells, wherein an IO partial driver cell comprises a first type of transistor and its respective IO driver cell comprises a second type of transistor, different from the first type;
an external resistor for providing a reference impedance; and
a reference partial driver cell coupled to the external resistor and being arranged to determine the reference impedance and to provide information depending on the reference impedance to the IO partial driver cells,
the IO partial driver cells being arranged to calibrate the respective IO driver cells based on the provided information.

2. An IO driver as claimed in claim 1 , further comprising a calibration engine, coupled to the plurality of IO partial driver cells and to the reference partial driver cell for controlling calibration of the IO driver cells.

3. An IO driver as claimed in claim 1 wherein an on-chip variation of the first type of transistor is significantly narrower than an on-chip variation of the second type of transistor.

4. An IO driver as claimed in claim 3 , wherein the first type of transistor is a dual gate oxide transistor and the second type of transistor is a thin gate oxide transistor.

5. An IO driver as claimed in claim 1 , wherein the IO partial driver cell is integrated with its respective IO driver cell.

6. A method for calibrating a plurality of IO driver cells of an IO driver, the method comprising:
a reference partial driver cell determining a reference impedance of an external resistor;
the reference partial driver cell providing information depending on the reference impedance to IO partial driver cells respectively coupled to the plurality of IO driver cells; and
the IO partial driver cells calibrating the respective IO driver cells based on the provided information, wherein an IO partial driver cell comprises a first type of transistor and its respective IO driver cell comprises a second type of transistor, different from the first type.

Assignees

• Priel Michael
• Kuzmin Dan
• Sofer Sergey
• Freescale Semiconductor Inc

Inventors

• Priel Michael
• Kuzmin Dan
• Sofer Sergey

Classifications

• H03K19/018557 Primary

  Coupling arrangements; Impedance matching circuits · CPC title

• G11C29/022

  in I/O circuitry · CPC title

• G11C7/1048

  Data bus control circuits, e.g. precharging, presetting, equalising · CPC title

• H03K19/0005

  Modifications of input or output impedance · CPC title

• H03K17/16

  Modifications for eliminating interference voltages or currents · CPC title