Semiconductor device and electronic device including the semiconductor device

Patent metadata

Field	Value
Publication number	US-9349875-B2
Application number	US-201514733081-A
Country	US
Kind code	B2
Filing date	Jun 8, 2015
Priority date	Jun 13, 2014
Publication date	May 24, 2016
Grant date	May 24, 2016

Abstract

A semiconductor device includes a first oxide semiconductor film, a second oxide semiconductor film over the first oxide semiconductor film, a source electrode in contact with the second oxide semiconductor film, a drain electrode in contact with the second oxide semiconductor film, a metal oxide film over the second oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the metal oxide film, and a gate electrode over the gate insulating film. The metal oxide film contains M (M represents Ti, Ga, Y, Zr, La, Ce, Nd, or Hf) and Zn. The metal oxide film includes a portion where x/(x+y) is greater than 0.67 and less than or equal to 0.99 when a target has an atomic ratio of M:Zn=x:y.

First claim

The invention claimed is:

1. A semiconductor device comprising:
a first oxide semiconductor film;
a second oxide semiconductor film over the first oxide semiconductor film;
a source electrode comprising a region in contact with the second oxide semiconductor film;
a drain electrode comprising a region in contact with the second oxide semiconductor film;
a metal oxide film over the second oxide semiconductor film, the source electrode, and the drain electrode;
a gate insulating film over the metal oxide film; and
a gate electrode over the gate insulating film,
wherein the metal oxide film comprises an element M (M represents Ti, Ga, Y, Zr, La, Ce, Nd, or Hf) and Zn, and
wherein the metal oxide film comprises a portion where x/(x+y) is greater than 0.67 and less than or equal to 0.99 when an atomic ratio of the element M to Zn in a target is represented by M:Zn=x:y.

2. The semiconductor device according to claim 1 ,
wherein the element M is Ga.

3. The semiconductor device according to claim 1 ,
wherein the second oxide semiconductor film comprises a plurality of crystal parts having c-axis alignment, and c-axes of the plurality of crystal parts are aligned in a direction parallel to a normal vector to an upper surface of the second oxide semiconductor film.

4. The semiconductor device according to claim 1 ,
wherein a channel length is greater than or equal to 5 nm and less than or equal to 200 nm.

5. The semiconductor device according to claim 1 ,
wherein an electron affinity of the second oxide semiconductor film is higher than an electron affinity of the first oxide semiconductor film.

6. An electronic device comprising the semiconductor device according to claim 1 .

7. A semiconductor device comprising:
a first oxide semiconductor film;
a second oxide semiconductor film over the first oxide semiconductor film;
a source electrode comprising a region in contact with the second oxide semiconductor film;
a drain electrode comprising a region in contact with the second oxide semiconductor film;
a metal oxide film over the second oxide semiconductor film, the source electrode, and the drain electrode;
a gate insulating film over the metal oxide film; and
a gate electrode over and in contact with the gate insulating film and facing an upper surface and a side surface of the second oxide semiconductor film,
wherein the metal oxide film comprises an element M (M represents Ti, Ga, Y, Zr, La, Ce, Nd, or Hf) and Zn, and
wherein the metal oxide film comprises a portion where x/(x+y) is greater than 0.67 and less than or equal to 0.99 when an atomic ratio of the element M to Zn in a target is represented by M:Zn=x:y.

8. The semiconductor device according to claim 7 ,
wherein the element M is Ga.

9. The semiconductor device according to claim 7 ,
wherein the second oxide semiconductor film comprises a plurality of crystal parts having c-axis alignment, and c-axes of the plurality of crystal parts are aligned in a direction parallel to a normal vector to the upper surface of the second oxide semiconductor film.

10. The semiconductor device according to claim 7 ,
wherein a channel length is greater than or equal to 5 nm and less than or equal to 200 nm.

11. The semiconductor device according to claim 7 ,
wherein an electron affinity of the second oxide semiconductor film is higher than an electron affinity of the first oxide semiconductor film.

12. An electronic device comprising the semiconductor device according to claim 7 .

13. A method for manufacturing a semiconductor device, comprising the steps of:
forming a first insulating film over a substrate;
forming a first oxide semiconductor film over the first insulating film;
forming a second oxide semiconductor film over the first oxide semiconductor film;
forming a source electrode and a drain electrode over the second oxide semiconductor film;
forming a metal oxide film over the second oxide semiconductor film, the source electrode, and the drain electrode, the metal oxide film comprising Zn and an element selected from the group consisting of Ti, Ga, Y, Zr, La, Ce, Nd, and Hf;
forming a gate insulating film over the metal oxide film; and
forming a gate electrode over the gate insulating film,
wherein the metal oxide film is formed by a sputtering method using a sputtering target,
wherein an atomic ratio of the element M to Zn in the sputtering target is represented by M:Zn=x:y, and
wherein x/(x+y) is greater than 0.67 and less than or equal to 0.99.

14. The method according to claim 13 ,
wherein the first oxide semiconductor film is formed by a sputtering method at a substrate temperature higher than or equal to 150° C. and lower than or equal to 450° C.

15. The method according to claim 13 ,
further comprising the step of forming a second insulating film over the gate electrode.

16. The method according to claim 13 ,
further comprising a step of performing a heat treatment after forming the first oxide semiconductor film.

17. The method according to claim 13 ,
wherein the sputtering target for forming the metal oxide film comprises Ga and Zn.

18. The method according to claim 13 ,
wherein the second oxide semiconductor film comprises a plurality of crystal parts having c-axis alignment, and c-axes of the plurality of crystal parts are aligned in a direction parallel to a normal vector to an upper surface of the second oxide semiconductor film.

19. The method according to claim 13 ,
wherein a channel length is greater than or equal to 5 nm and less than or equal to 200 nm.

20. The method according to claim 13 ,
wherein an electron affinity of the second oxide semiconductor film is higher than an electron affinity of the first oxide semiconductor film.

21. A semiconductor device comprising:
a first oxide semiconductor film;
a second oxide semiconductor film over the first oxide semiconductor film;
a source electrode comprising a region in contact with the second oxide semiconductor film;
a drain electrode comprising a region in contact with the second oxide semiconductor film;
a metal oxide film over the second oxide semiconductor film;
a gate insulating film over the metal oxide film; and
a gate electrode over the gate insulating film,
wherein the metal oxide film comprises an element M (M represents Ti, Ga, Y, Zr, La, Ce, Nd, or Hf) and Zn,
wherein the metal oxide film comprises a portion where x/(x+y) is greater than 0.67 and less than or equal to 0.99 when an atomic ratio of the element M to Zn is represented by M:Zn=x:y, and
wherein the metal oxide film is in contact with the second oxide semiconductor film.

22. The semiconductor device according to claim 21 , wherein the element M is Ga.

23. The semiconductor device according to claim 21 ,
wherein the second oxide semiconductor film comprises a plurality of crystal parts having c-axis alignment, and c-axes of the plurality of crystal parts are aligned in a direction parallel to a normal vector to an upper surface of the second oxide semiconductor film.

24. The semiconductor device according to claim 21 ,
wherein a channel length is greater than or equal to 5 nm and less than or equal to 200 nm.

25. The semiconductor device according to claim 21 ,
wherein an electron affinity of the second oxide semiconductor film is higher than an electron affinity of the first oxide semiconductor film.

26. An elec

Assignees

• Semiconductor Energy Lab

Inventors

• Tsubuku Masashi
• Takeuchi Toshihiko
• Yamane Yasumasa
• Oota Masashi

Classifications

• H10P95/90

  Thermal treatments, e.g. annealing or sintering · CPC title

• H10P14/3434

  being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424) · CPC title

• H10P14/3426

  Oxides · CPC title

• H10P14/3238

  being insulating materials · CPC title

• H10P14/3234

  being oxide semiconducting materials (Group IIB-VIA semiconductors H10P14/3224) · CPC title