ADC calibration

US9344106B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9344106-B2
Application numberUS-201414570725-A
CountryUS
Kind codeB2
Filing dateDec 15, 2014
Priority dateAug 11, 2009
Publication dateMay 17, 2016
Grant dateMay 17, 2016

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  1. Title

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  2. Abstract

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An analog-to-digital converter (ADC) includes a plurality of comparators connected to the ADC. The ADC further includes a plurality of switches, wherein switches connected to a corresponding comparator of the plurality of comparators are configured to alternate the corresponding comparator between normal operation and a calibration configuration. The ADC further includes at least one comparator of the plurality of comparators other than the corresponding comparator is configured for normal operation if the corresponding comparator is configured for calibration.

First claim

Opening claim text (preview).

What is claimed is: 1. An analog-to-digital converter (ADC) comprising: a plurality of comparators including a first comparator having a first terminal and a second terminal; a plurality of switches including a first switch configured to electrically connect a first reference voltage to the first terminal of the first comparator, a second switch configured to electrically connect a second reference voltage to the first terminal of the first comparator, and a third switch coupled to the second terminal of the first comparator, wherein the third switch is configured to alternate the first comparator between normal operation and a calibration operation; and a second comparator of the plurality of comparators other than the first comparator, wherein the second comparator is configured for normal operation when the first comparator is in calibration operation. 2. The ADC of claim 1 , wherein the third switch is configured to selectively electrically connect a calibration signal to the first comparator. 3. The ADC of claim 1 , wherein the first switch is further configured to selectively electrically connect the first reference voltage to the second comparator. 4. The ADC of claim 1 , further comprising an encoder configured to receive a thermometer code from each comparator of the plurality of comparators. 5. The ADC of claim 4 , wherein the encoder is configured to transform the thermometer code from each comparator of the plurality of comparators into binary code. 6. The ADC of claim 4 , further comprising a decimator configured to receive an output of the encoder. 7. The ADC of claim 6 , wherein the decimator is configured to attenuate out of band signals from the output of the encoder. 8. The ADC of claim 1 , wherein at least one comparator of the plurality of comparators is a differential comparator. 9. An analog-to-digital converter (ADC) comprising: a first comparator; a first terminal coupled to the first comparator; a first switch coupled to the first terminal; a second switch coupled to the first terminal; and a third switch coupled to a second terminal of the first comparator, wherein the third switch is configured to selectively electrically connect the second terminal of the first comparator to a calibration signal, wherein the first switch is configured to electrically disconnect the first comparator from a first reference voltage and the second switch is configured to electrically disconnect the first comparator from a second reference voltage. 10. The ADC of claim 9 , wherein the first switch is configured to selectively electrically connect a second comparator to the first reference voltage. 11. The ADC of claim 9 , further comprising a third switch coupled to a first terminal of a second comparator, and wherein the first switch is coupled to the first terminal of the second comparator. 12. The ADC of claim 11 , wherein the first switch is configured to selectively electrically connect the second comparator to the first reference voltage. 13. The ADC of claim 9 , wherein the first comparator is a differential comparator. 14. The ADC of claim 9 , further comprising an encoder configured to transform a thermometer code from the first comparator into binary code. 15. The ADC of claim 14 , further comprising a decimator configured to attenuate out of band signals in the binary code. 16. A method of operating an analog-to-digital converter (ADC), the method comprising: switching a first comparator of a plurality of comparators in the ADC to a calibration mode; maintaining a second comparator of the plurality of comparators in a normal operation mode while the first comparator is in the calibration mode; calibrating the first comparator based on an offset value at an output of the first comparator; switching the second comparator to the calibration mode; and switching the first comparator to the normal operation mode while the second comparator is in the calibration mode. 17. The method of claim 16 , wherein switching the second comparator to the calibration mode comprises disconnecting the second comparator from a reference voltage, and switching the first comparator to the normal operation comprises connecting the first comparator to the reference voltage. 18. The method of claim 16 , wherein switching the second comparator to the calibration mode comprises connecting the second comparator to a calibration signal, and switching the first comparator to the normal operation comprises disconnecting the first comparator from the calibration signal. 19. The method of claim 16 , wherein switching the second comparator to the calibration mode comprises: connecting a first terminal of the second comparator to a first calibration signal; connecting a second terminal of the second comparator to a second calibration signal; disconnecting a third terminal of the second comparator from a first reference voltage; and disconnecting a fourth terminal of the second comparator from a second reference voltage.

Assignees

Inventors

Classifications

  • H03M1/365Primary

    the voltage divider being a single resistor string · CPC title

  • without interrupting normal operation, e.g. by providing an additional component for temporarily replacing components to be tested or calibrated (H03M1/1009, H03M1/1071 take precedence) · CPC title

  • H03M1/1009Primary

    Calibration · CPC title

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What does patent US9344106B2 cover?
An analog-to-digital converter (ADC) includes a plurality of comparators connected to the ADC. The ADC further includes a plurality of switches, wherein switches connected to a corresponding comparator of the plurality of comparators are configured to alternate the corresponding comparator between normal operation and a calibration configuration. The ADC further includes at least one comparator…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg
What technology area does this patent fall under?
Primary CPC classification H03M1/365. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 17 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).