Semiconductor device and fabrication method

US9343874B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9343874-B2
Application numberUS-201314418399-A
CountryUS
Kind codeB2
Filing dateJul 30, 2013
Priority dateAug 1, 2012
Publication dateMay 17, 2016
Grant dateMay 17, 2016

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  1. Title

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Abstract

Official abstract text for this publication.

A semiconductor device comprising a silicon substrate on which is grown a <100 nm thick epilayer of AlAs or related compound, followed by a compound semiconductor other than GaN buffer layer. Further III-V compound semiconductor structures can be epitaxially grown on top. The AlAs epilayer reduces the formation and propagation of defects from the interface with the silicon, and so can improve the performance of an active structure grown on top.

First claim

Opening claim text (preview).

The invention claimed is: 1. A semiconductor device comprising: a silicon substrate; an epilayer formed on the silicon substrate; and at least one layer of III-V compound directly on the epilayer, wherein the epilayer comprises a compound of the formula: Al 1-x [X] x As wherein: X is at least one group III element other than Al; x is greater than or equal to 0; and x is less than or equal to 0.5, wherein the at least one layer of III-V compound directly on the epilayer is one of a GaAs layer, an InP layer or a GaSb layer. 2. The semiconductor device of claim 1 , wherein the mean thickness of the epilayer is less than 100 nm. 3. The semiconductor device of claim 1 , wherein the mean thickness of the epilayer is less than 20 nm. 4. The semiconductor device of claim 1 , wherein the mean thickness of the epilayer is less than 10 nm. 5. The semiconductor device of claim 1 , wherein X is Ga. 6. The semiconductor device of claim 1 , wherein the epilayer is AlAs. 7. The semiconductor device of claim 1 , wherein the at least one layer of III-V compound has a zinc blende crystal structure. 8. A quantum dot laser comprising: a semiconductor device comprising: a silicon substrate; an epilayer formed on the silicon substrate; and at least one layer of III-V compound directly on the epilayer, wherein the epilayer comprises a compound of the formula: Al 1-x [X] x As wherein: X is at least one group III element other than Al; x is greater than or equal to 0; and x is less than or equal to 0.5 wherein the at least one layer of III-V compound directly on the epilayer is one of a GaAs layer, an InP layer or a GaSb layer. 9. The quantum dot laser of claim 8 , wherein a lasing wavelength of the quantum dot laser is in the range of from 1250 nm to 1350 nm. 10. The quantum dot laser of claim 8 , comprising InAs/GaAs quantum dot structures. 11. A method of fabricating a semiconductor device comprising: providing a silicon substrate; epitaxially growing an epilayer on the silicon substrate; and epitaxially growing at least one layer of III-V compound on the epilayer, wherein the at least one layer of III-V compound is one of a GaAs layer, an InP layer or a GaSb layer; wherein the epilayer comprises a compound of the formula: Al 1-x [X] x As wherein: X is at least one group III element other than Al; x is greater than or equal to 0; and x is less than or equal to 0.5. 12. The method of claim 11 , wherein the epilayer is grown to have a mean thickness of less than 100 nm. 13. The method of claim 11 , wherein growing the epilayer is done at a temperature below 500° C. 14. The method of claim 11 , wherein the epilayer is AlAs. 15. The quantum dot laser of claim 8 , wherein the mean thickness of the epilayer is less than 10 nm. 16. The quantum dot laser of claim 8 , wherein X is Ga. 17. The quantum dot laser of claim 8 , wherein the epilayer is AlAs. 18. The quantum dot laser of claim 8 , wherein the at least one layer of III-V compound has a zinc blende crystal structure.

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What does patent US9343874B2 cover?
A semiconductor device comprising a silicon substrate on which is grown a <100 nm thick epilayer of AlAs or related compound, followed by a compound semiconductor other than GaN buffer layer. Further III-V compound semiconductor structures can be epitaxially grown on top. The AlAs epilayer reduces the formation and propagation of defects from the interface with the silicon, and so can improve t…
Who is the assignee on this patent?
Ucl Business Plc
What technology area does this patent fall under?
Primary CPC classification H01S5/3412. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 17 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).