Semiconductor device and fabrication method

US2016233647A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016233647-A1
Application numberUS-201615099906-A
CountryUS
Kind codeA1
Filing dateApr 15, 2016
Priority dateAug 1, 2012
Publication dateAug 11, 2016
Grant date

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Abstract

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A semiconductor device comprising a silicon substrate on which is grown a <100 nm thick epilayer of AlAs or related compound, followed by a compound semiconductor other than GaN buffer layer. Further III-V compound semiconductor structures can be epitaxially grown on top. The AlAs epilayer reduces the formation and propagation of defects from the interface with the silicon, and so can improve the performance of an active structure grown on top.

First claim

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1 . A semiconductor laser device comprising: a silicon substrate; an epilayer formed on the substrate; and at least one layer of III-V compound, other than GaN, on the epilayer, wherein the epilayer comprises a compound of the formula: Al 1-x [X] x As wherein: X is at least one group III element other than Al; x is greater than or equal to 0; and x is less than or equal to 0.5. 2 . A semiconductor laser device according to claim 1 , wherein the mean thickness of the epilayer is less than 100 nm. 3 . A semiconductor laser device according to claim 1 , wherein the mean thickness of the epilayer is less than 20 nm. 4 . A semiconductor laser device according to claim 1 , wherein the mean thickness of the epilayer is less than 10 nm. 5 . A semiconductor laser device according to claim 1 , wherein the first III-V compound layer grown on the epilayer is one of a GaAs layer, an InP layer or a GaSb layer. 6 . A semiconductor laser device according to claim 1 , wherein X is Ga. A semiconductor laser device according to claim 1 , wherein the epilayer is AlAs. 8 . A semiconductor laser device according claim 1 , wherein the III-V compound layer has a zinc blende crystal structure. 9 . A quantum dot laser comprising: a semiconductor laser device comprising: a silicon substrate; an epilayer formed on the silicon substrate; and at least one layer of III-V compound, other than GaN, on the epilayer, wherein the epilayer comprises a compound of the formula: Al 1-x [X] x As wherein: X is at least one group III element other than Al; x is greater than or equal to 0; and x is less than or equal to 0.5. 10 . A quantum dot laser according to claim 9 , wherein the lasing wavelength is in the range of from 1250 nm to 1350 nm. 11 . A quantum dot laser according to claim 9 , comprising InAs/GaAs quantum dot structures. 12 . The quantum dot laser of claim 9 , wherein the mean thickness of the epilayer is less than 10 nm. 13 . The quantum dot laser of claim 9 , wherein X is Ga. 14 . The quantum dot laser of claim 9 , wherein the epilayer is AlAs. 15 . The quantum dot laser of claim 9 , wherein the at least one layer of III-V compound has a zinc blende crystal structure. 16 . A method of fabricating a semiconductor laser device, said method comprising: providing a silicon substrate; epitaxially growing an epilayer on the substrate; and epitaxially growing at least one layer of III-V compound, other than GaN, on the epilayer, wherein the epilayer comprises a compound of the formula: Al 1-x [X] x As wherein: X is at least one group III element other than Al; x is greater than or equal to 0; and x is less than or equal to 0.5. 17 . A method according to claim 16 , comprising growing the epilayer to have a mean thickness of less than 100 nm, preferably less than 20 nm, more preferably less than 10 nm. 18 . A method according to claim 16 , comprising growing the epilayer at a temperature below 500° C. 19 . A method according to claim 16 , wherein the epilayer is AlAs.

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What does patent US2016233647A1 cover?
A semiconductor device comprising a silicon substrate on which is grown a <100 nm thick epilayer of AlAs or related compound, followed by a compound semiconductor other than GaN buffer layer. Further III-V compound semiconductor structures can be epitaxially grown on top. The AlAs epilayer reduces the formation and propagation of defects from the interface with the silicon, and so can improve t…
Who is the assignee on this patent?
Ucl Business Plc
What technology area does this patent fall under?
Primary CPC classification H01S5/3412. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Aug 11 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).