Self-formation of high-density arrays of nanostructures

Patent metadata

Field	Value
Publication number	US-9324794-B2
Application number	US-201514726104-A
Country	US
Kind code	B2
Filing date	May 29, 2015
Priority date	Mar 21, 2013
Publication date	Apr 26, 2016
Grant date	Apr 26, 2016

Abstract

A method for forming nanostructures includes bonding a flexible substrate to a crystalline semiconductor layer having a two-dimensional material formed on a side opposite the flexible substrate. The crystalline semiconductor layer is stressed in a first direction to initiate first cracks in the crystalline semiconductor layer. The first cracks are propagated through the crystalline semiconductor layer and through the two-dimensional material. The stress of the crystalline semiconductor layer is released to provide parallel structures including the two-dimensional material on the crystalline semiconductor layer.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a flexible substrate;
a crystalline semiconductor layer bonded to the flexible substrate, the crystalline semiconductor layer being cracked to form parallel structures along at least one direction; and
a two-dimensional material formed on the crystalline semiconductor layer being separated at cracks in the crystalline semiconductor layer to form nanostructures.

2. The device as recited in claim 1 , wherein the cracks are spaced by an intercrack distance which is proportional to an applied strain during crack propagation.

3. The device as recited in claim 1 , wherein the two-dimensional material includes graphene.

4. The device as recited in claim 1 , wherein the crystalline semiconductor layer includes SiC.

5. The device as recited in claim 1 , further comprising second cracks formed transversely to the cracks along the at least one direction.

6. The device as recited in claim 5 , wherein the second cracks are formed through the crystalline semiconductor layer and through the two-dimensional material.

7. The device as recited in claim 6 , wherein the second cracks in combination with first cracks provide dot structures including the two-dimensional material on the crystalline semiconductor layer.

8. The device as recited in claim 1 , further comprising: an electronic or photonic device formed by incorporating the parallel structures.

Assignees

• IBM

Inventors

• Dimitrakopoulos Christos D
• Kim Jeehwan
• Park Hongsik
• Shin Byungha

Classifications

• H10P52/00

  Grinding, lapping or polishing of wafers, substrates or parts of devices · CPC title

• H10P14/3408

  Silicon carbide · CPC title

• H10P14/3406

  Carbon, e.g. diamond-like carbon · CPC title

• H10P14/38 Primary

  characterised by treatments done after the formation of the materials · CPC title

• C30B33/06

  Joining of crystals · CPC title