Use of electrolytic plating to control solder wetting

US9324669B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9324669-B2
Application numberUS-201414484313-A
CountryUS
Kind codeB2
Filing dateSep 12, 2014
Priority dateSep 12, 2014
Publication dateApr 26, 2016
Grant dateApr 26, 2016

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A method including forming a copper pillar, electroplating a metal layer on a top surface and a sidewall of the copper pillar, and electroplating a metal cap above the top surface of the copper pillar in direct contact with the metal layer. The method further including forming an intermetallic by heating the metal layer and the copper pillar in a non-reducing environment, the intermetallic including elements of both the copper pillar and the metal layer, where molten solder will wet to the metal cap and will not wet to the intermetallic.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising: forming a copper pillar; electroplating a metal layer on a top surface and a sidewall of the copper pillar; electroplating a metal cap above the top surface of the copper pillar in direct contact with the metal layer, wherein the metal cap is less than 1 μm; and forming an intermetallic by heating the metal layer and the copper pillar in a non-reducing environment, the intermetallic comprising elements of both the copper pillar and the metal layer, wherein the intermetallic comprises one of: only Cu 3 Sn; only Cu 3 Sn and SnO 2 ; and only tin, Cu 3 Sn, and SnO 2 , wherein molten solder will wet to the metal cap and will not wet to the intermetallic. 2. The method of claim 1 , wherein forming the copper pillar comprises: patterning an opening in a photoresist layer above a quad layer plating structure comprising a first layer, a second layer, a third layer, and a fourth layer, each layer is conductive and is formed successively one on top of another; and electroplating the copper pillar structure in the opening by applying an electrical potential to the second layer, copper from a plating solution plates out on the fourth layer exposed at a bottom of the opening. 3. The method of claim 1 , wherein forming the copper pillar comprises: patterning an opening in a photoresist layer; electroplating the copper pillar structure in the opening; and removing a portion of the photoresist layer immediately adjacent to the copper pillar to form a space, the space is formed by exposing the photoresist layer to a high temperature high pH plating bath. 4. The method of claim 1 , wherein the metal layer comprises tin and the metal cap comprises gold. 5. The method of claim 1 , further comprising: forming a solder bump directly on top of the metal cap. 6. The method of claim 1 , further comprising: electroplating a solder cap directly on top of the metal cap; and heating the solder cap to a molten state after completely removing the photoresist layer. 7. A method comprising: forming a copper pillar; forming a solder bump directly on a top surface of the copper pillar by electroplating a solder cap and reflowing the solder cap to form the solder bump; electroplating a metal layer on a top surface of the solder bump and on a sidewall of the copper pillar, wherein the metal layer comprises tin and is less than 1 μm; and forming an intermetallic from a first portion of the metal layer in contact with the sidewall of the copper pillar by heating the metal layer and the copper pillar in a non-reducing environment, the intermetallic comprising elements of both the copper pillar and the metal layer, a second portion of the metal layer in contact with the solder bump remains unreacted, wherein forming the intermetallic includes: converting a portion of the metal layer in direct contact with the copper pillar to Cu 3 Sn; and oxidizing an outermost portion of the metal layer to forming SnO 2 , wherein the intermetallic comprises one of: only Cu 3 Sn; only Cu 3 Sn and SnO 2 ; and only tin, Cu 3 Sn, and SnO 2 . 8. The method of claim 7 , wherein forming the copper pillar comprises: patterning an opening in a photoresist layer above a quad layer plating structure comprising a first layer, a second layer, a third layer, and a fourth layer, each layer is conductive and is formed successively one on top of another; and electroplating the copper pillar structure in the opening by applying an electrical potential to the second layer, copper from a plating solution plates out on the fourth layer exposed at a bottom of the opening. 9. The method of claim 7 , wherein forming the copper pillar comprises: patterning an opening in a photoresist layer; electroplating the copper pillar structure in the opening; and removing a portion of the photoresist layer immediately adjacent to the copper pillar to form a space, the space is formed by exposing the photoresist layer to a high temperature high pH plating bath. 10. The method of claim 7 , wherein forming the solder bump directly on top of the copper pillar comprises: electroplating a solder cap directly on top of the copper pillar and within the opening; removing the photoresist layer; and reflowing the solder cap to form a hemispherical solder bump in which the surface tension limits molten solder from extending beyond the top surface of the copper pillar during reflow. 11. The method of claim 7 , further comprising: heating the solder bump to a molten state after formation of the intermetallic, wherein molten solder will wet to the top surface of the copper pillar and will not wet to the intermetallic. 12. A method comprising: forming a copper pillar; electroplating a first metal layer on a top surface and a sidewall of the copper pillar; electroplating a second metal layer on top of the first metal layer, wherein the second metal layer is less than 1 μm; and forming an intermetallic by heating the first metal layer and the copper pillar in a non-reducing environment, the intermetallic comprising elements of both the copper pillar and the metal layer, wherein the intermetallic comprises one of: only Cu 3 Sn; only Cu 3 Sn and SnO 2 ; and only tin, Cu 3 Sn, and SnO 2 wherein molten solder will wet to the second metal layer. 13. The method of claim 12 , wherein forming the copper pillar comprises: patterning an opening in a photoresist layer above a quad layer plating structure comprising a first layer, a second layer, a third layer, and a fourth layer, each layer is conductive and is formed successively one on top of another; electroplating the copper pillar structure in the opening by applying an electrical potential to the second layer, copper from a plating solution plates out on the fourth layer exposed at a bottom of the opening; removing an exposed portion of the quad layer plating structure such that a remaining portion of the quad layer plating structure remains beneath the copper pillar; and removing remaining exposed layers of the quad layer plating structure. 14. The method of claim 12 , wherein forming the copper pillar comprises: patterning an opening in a photoresist layer; electroplating the copper pillar structure in the opening; and removing a portion of the photoresist layer immediately adjacent to the copper pillar to form a space, the space is formed by exposing the photoresist layer to a high temperature high pH plating bath. 15. The method of claim 12 , wherein the first metal layer comprises tin, nickel, or some combination thereof. 16. The method of claim 12 , wherein the second metal layer comprises gold, palladium, or some combination thereof.

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What does patent US9324669B2 cover?
A method including forming a copper pillar, electroplating a metal layer on a top surface and a sidewall of the copper pillar, and electroplating a metal cap above the top surface of the copper pillar in direct contact with the metal layer. The method further including forming an intermetallic by heating the metal layer and the copper pillar in a non-reducing environment, the intermetallic incl…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H10W72/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 26 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).