FinFET spacer formation by oriented implantation

Patent metadata

Field	Value
Publication number	US-9318578-B2
Application number	US-201213628561-A
Country	US
Kind code	B2
Filing date	Sep 27, 2012
Priority date	Nov 3, 2009
Publication date	Apr 19, 2016
Grant date	Apr 19, 2016

Abstract

A FinFET having spacers with a substantially uniform profile along the length of a gate stack which covers a portion of a fin of semiconductor material formed on a substrate is provided by depositing spacer material conformally on both the fins and gate stack and performing an angled ion impurity implant approximately parallel to the gate stack to selectively cause damage to only spacer material deposited on the fin. Due to the damage caused by the angled implant, the spacer material on the fins can be etched with high selectivity to the spacer material on the gate stack.

First claim

The invention claimed is:

1. A method of forming at least one finFET, said method comprising:
forming at least two fins of semiconductor material on a substrate by a spacer image transfer process;
forming a gate stack across one fin of said at least two fins;
conformally depositing a blanket layer of spacer material on said fins, gate stack and substrate;
performing an anisotropic etch process to etch spacer material deposited in said step of conformally depositing said spacer material to form sidewall spacers;
performing angled ion impurity implants into said spacer material on both sides of said fins in a direction substantially parallel to sides of said gate stack to engender etch selectivity in said spacer material on sides of said fins relative to spacer material on sides of said gate stack, wherein said angled ion impurity implants are performed before said anisotropic etch;
etching said spacer material to remove said spacer material damaged by said angled impurity implants from said semiconductor material on major portions of sides of said at least two fins selectively to said spacer material on said gate stack, leaving spacer material on said gate stack; and
performing epitaxial growth of semiconductor material on both sides of said at least two fins proximate to ends of said fins where said fins are exposed by said etching of said spacer material.

2. The method of claim 1 , wherein said anisotropic etch is a reactive ion etch process.

3. The method of claim 1 , wherein said gate stack extends across said at least two fins, including a further step of merging ends of said at least two fins.

4. The method of claim 1 , including a further step of merging ends of said at least two fins.

5. The method of claim 1 , wherein said step of performing an angled implantation is performed prior to said step of performing an anisotropic etch and said step of performing an anisotropic etch is performed after said step of etching said spacer material to remove said spacer material from said fins selectively to said spacer material on said gate stack.

6. The method of claim 1 , wherein said step of forming at least two fins includes formation of a cap on at least one said fin.

7. A method of forming a finFET, said method comprising:
forming at least one fin of semiconductor material on a substrate;
forming a gate stack across said fin;
conformally depositing spacer material on said fin, said gate stack, and said substrate;
performing angled ion impurity implants into said spacer material on both sides of said fin in a direction substantially parallel to sides of said gate stack to cause damage to said spacer material on said fin and engender etch selectivity in said spacer material on sides of said fins relative to spacer material on sides of said gate stack;
performing an anisotropic etch process to etch said spacer material deposited in said step of conformally depositing said spacer material to form spacers on said sides of at least said gate stack;
etching said spacer material to remove said spacer material damaged by said angled impurity implants from sides of said fin selectively to said spacer material on said sides of said gate stack; and
performing epitaxial growth of semiconductor material on both sides of said fin exposed by said etching to effectively thicken source and drain regions of said fin,
wherein said step of performing angled ion impurity implants is performed prior to said step of performing an anisotropic etch.

8. The method of claim 7 , wherein said anisotropic etch is a reactive ion etch process.

9. The method of claim 7 , wherein said step of performing an angled implantation is performed prior to said step of performing an anisotropic etch and said step of performing an anisotropic etch is performed after said step of etching said spacer material to remove said spacer material from said fins selectively to said spacer material on said gate stack.

10. The method of claim 9 , continuing said step of performing epitaxial growth to merge fins of at least two FinFETs.

11. The method of claim 7 , continuing said step of performing epitaxial growth to merge fins of at least two FinFETs.

12. The method of claim 7 , wherein said step of forming at least one fin includes formation of a cap on said at least one fin.

13. The method of claim 7 , including a further step of merging fins of at least two FinFETs.

Assignees

• Globalfoundries Inc

Inventors

• Basker Veeraraghavan S
• Cheng Kangguo
• Doris Bruce B
• Faltermeier Johnathan E

Classifications

• H10P30/222 Primary

  characterised by the angle between the ion beam and the crystal planes or the main crystal surface (characterised by the angle between the ion beam and the mask H10P30/221) · CPC title

• H10D30/62

  Fin field-effect transistors [FinFET] · CPC title

• H10D30/024 Primary

  of fin field-effect transistors [FinFET] · CPC title

• H10D86/00

  Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates · CPC title

• H10D84/0158

  the components including FinFETs · CPC title