Semiconductor apparatus with band energy alignments

Patent metadata

Field	Value
Publication number	US-9318562-B2
Application number	US-201213533033-A
Country	US
Kind code	B2
Filing date	Jun 26, 2012
Priority date	Aug 1, 2011
Publication date	Apr 19, 2016
Grant date	Apr 19, 2016

Abstract

A semiconductor apparatus includes: a semiconductor apparatus includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type; and a third semiconductor layer of the first conductivity type, wherein: the second semiconductor layer is formed between the first and third semiconductor layers, and the first and second semiconductor layers are in contact with each other; and a first energy level at a bottom edge of a conduction band of the first semiconductor layer is lower than a second energy level at a top edge of a valence band of the second semiconductor layer, and the second energy level at the top edge of the valence band of the second semiconductor layer is substantially the same as a third energy level at a bottom edge of a conduction band of the third semiconductor layer.

First claim

What is claimed is:

1. A semiconductor apparatus comprising:
a first semiconductor layer of a first conductivity type;
a second semiconductor layer of a second conductivity type; and
a third semiconductor layer of the first conductivity type, wherein:
the second semiconductor layer is formed between the first and third semiconductor layers, and the first and second semiconductor layers are in contact with each other;
a first energy level at a bottom edge of a conduction band of the first semiconductor layer is lower than a second energy level at a top edge of a valence band of the second semiconductor layer;
the second energy level is higher than a Fermi level in the second semiconductor layer;
a third energy level at a bottom edge of a conduction band of the third semiconductor layer is higher than the Fermi level;
the first semiconductor layer is formed of n + -In 0.53 Ga 0.47 As; and
the second semiconductor layer is formed of p + -GaAs 0.51 Sb 0.49 .

2. The semiconductor apparatus according to claim 1 , wherein a discrete energy level is formed in the second semiconductor layer.

3. The semiconductor apparatus according to claim 1 , further comprising: a barrier layer formed of a semiconductor which is not doped with impurity elements and formed between the second and third semiconductor layers.

4. The semiconductor apparatus according to claim 3 , wherein the barrier layer is formed of InAlAs.

5. The semiconductor apparatus according to claim 1 , wherein, if a Fermi level is denoted by Er, a condition that the first energy level <Er<the second energy level is satisfied.

6. The semiconductor apparatus according to claim 1 , wherein the first semiconductor layer is more heavily doped with an impurity element than the third semiconductor layer.

7. The semiconductor apparatus according to claim 1 , wherein the third semiconductor layer is formed of InGaAs.

8. The semiconductor apparatus according to claim 1 , further comprising: a first electrode that is connected to the first semiconductor layer, and a second electrode that is connected to the third semiconductor layer;
wherein the first electrode is one electrode of a diode and the second electrode of the other electrode of the diode.

Assignees

• Takahashi Tsuyoshi
• Fujitsu Ltd

Inventors

• Takahashi Tsuyoshi

Classifications

• H10D8/755

  Resonant tunneling diodes [RTD] · CPC title

• H10D8/053 Primary

  of heterojunction diodes or of tunnel diodes · CPC title

• H10D62/82 Primary

  Heterojunctions · CPC title

• H01L29/267 Primary

  Electricity · mapped topic

• H01L29/882

  Electricity · mapped topic