Semiconductor structures comprising at least one through-substrate via filled with conductive materials

Patent metadata

Field	Value
Publication number	US-9318438-B2
Application number	US-201514679845-A
Country	US
Kind code	B2
Filing date	Apr 6, 2015
Priority date	Dec 12, 2012
Publication date	Apr 19, 2016
Grant date	Apr 19, 2016

Abstract

A method for selectively removing material from a substrate without damage to copper filling a via and extending at least partially through the substrate. The method comprises oxidizing a semiconductor structure comprising a substrate and at least one copper feature and removing a portion of the substrate using an etchant comprising SF 6 without forming copper sulfide on the at least one copper feature. Additional methods are also disclosed, as well as semiconductor structures produced from such methods.

First claim

What is claimed is:

1. A semiconductor structure, comprising:
a first substrate comprising first copper features therein, upper ends of the first copper features protruding above a top surface of the first substrate, lower ends of the first copper features coplanar with a bottom surface of the first substrate; and
a second substrate stacked on the first substrate, the second substrate comprising second copper features therein, upper ends of the second copper features protruding above a top surface of the second substrate, lower ends of the second copper features coplanar with a bottom surface of the second substrate,
wherein each of the first copper features of the first substrate protrudes above the top surface of the first substrate substantially the same distance, and
wherein the protruding upper ends of the first copper features of the first substrate are connected to the lower coplanar ends of the second copper features of the second substrate.

2. The semiconductor structure of claim 1 , wherein the first and second copper features comprise through silicon vias filled with copper.

3. The semiconductor structure of claim 1 , wherein the upper ends of each of the first copper features extend about 4 microns above the top surface of the first substrate.

4. The semiconductor structure of claim 1 , wherein a thickness of the first substrate is about 50 microns.

5. The semiconductor structure of claim 1 , wherein the first substrate comprising first copper features therein comprises a silicon substrate comprising through silicon vias filled with copper therein.

6. The semiconductor structure of claim 1 , wherein the first substrate further comprises a silicon oxide material over side surfaces of the first copper features protruding above the surface of the first substrate.

7. A semiconductor structure, comprising:
a first structure comprising a first substrate, at least one first through-substrate via filled with a first conductive material, and an insulating material and a diffusion barrier material over sidewalls of the at least one first through-substrate via, the at least one first through-substrate via comprising a first end protruding above a top surface of the first substrate and a second end coplanar with a bottom surface of the first substrate; and
a second structure comprising a second substrate, at least one second through-substrate via filled with a second conductive material, the at least one second through-substrate via comprising an end coplanar with a surface of the second substrate, the coplanar end of the at least one second through-substrate via connecting to the protruding first end of the at least one first through-substrate via.

8. The semiconductor structure of claim 7 , wherein the first and second conductive materials comprise copper.

9. The semiconductor structure of claim 7 , wherein the insulating material comprises silicon oxide.

10. The semiconductor structure of claim 7 , wherein the diffusion barrier material comprises a material selected from the group consisting of tantalum (Ta), tantalum nitride (TaN), titanium (Ti), titanium nitride (TiN), titanium aluminum nitride (TiAlN), titanium zirconium (TiZr), and titanium zirconium nitride (TiZrN).

11. The semiconductor structure of claim 7 , further comprising a third conductive material connecting the protruding first end of the at least one first through-substrate via to the coplanar end of the at least one second through-substrate via.

12. A semiconductor structure, comprising:
a first structure comprising a first substrate and at least one first conductive through-substrate via, one end of the at least one first conductive through-substrate via protruding above a top surface of the first substrate and defining at least one contact of the first structure;
a second structure comprising a second substrate and at least one second conductive through-substrate via, the at least one second conductive through-substrate via comprising one end protruding above a top surface of the second substrate and another end coplanar with a bottom surface of the second substrate, the coplanar end of the at least one second conductive through-substrate via defining at least one contact of the second structure;
a passivation material on the bottom surface of the second substrate; and
a conductive material connecting the at least one contact of the first structure to the at least one contact of the second structure.

13. The semiconductor structure of claim 12 , further comprising an insulating component over side surfaces of the protruding end of the at least one first conductive through-substrate via.

14. The semiconductor structure of claim 13 , wherein the insulating component over side surfaces of the protruding end of the at least one first conductive through-substrate via comprises an insulating material and a diffusion barrier material.

15. The semiconductor structure of claim 12 , wherein a width of one through-substrate via of the at least one first conductive through-substrate via differs from the width of other through-substrate vias of the at least one first conductive through-substrate via.

16. The semiconductor structure of claim 12 , wherein the protruding end of the at least one first conductive through-substrate via extends from about 2 microns to about 10 microns above the top surface of the first substrate.

17. The semiconductor structure of claim 12 , wherein each of the protruding ends of the at least one first conductive through-substrate via extends above the top surface of the first substrate for substantially the same distance.

18. The semiconductor structure of claim 12 , wherein the at least one first conductive through-substrate via comprises a through-substrate via filled with copper, and wherein the protruding end of the at least one first conductive through-substrate via is substantially free of copper sulfide.

19. The semiconductor structure of claim 12 , wherein the conductive material comprises a material selected from the group consisting of a solder material, a conductive resin, a conductor-filled resin, and an anisotropic conductive film.

20. The semiconductor structure of claim 1 , wherein the protruding upper ends of the copper features of the first substrate are substantially free of copper sulfide.

Assignees

• Micron Technology Inc

Inventors

• Bossler Mark A
• Gandhi Jaspreet S
• Gambee Christopher J
• Parker Randall S

Classifications

• H10W20/0249

  wherein the through-semiconductor via protrudes from backsides of the chips, wafers or substrates during the manufacture · CPC title

• H10P70/27

  during, before or after processing of conductive materials, e.g. polysilicon or amorphous silicon layers · CPC title

• H10P14/6309

  of silicon in uncombined form, i.e. pure silicon · CPC title

• H10P50/642 Primary

  Chemical etching · CPC title

• H10P50/242

  of Group IV materials · CPC title