Managing translations across multiple contexts using a TLB with entries directed to multiple privilege levels and to multiple types of address spaces

Patent metadata

Field	Value
Publication number	US-9317443-B2
Application number	US-201414255457-A
Country	US
Kind code	B2
Filing date	Apr 17, 2014
Priority date	Apr 17, 2014
Publication date	Apr 19, 2016
Grant date	Apr 19, 2016

Abstract

For a current context in control of a processor requesting access to a particular address, a translation lookaside buffer (TLB) controller specifies a virtual address with a logical partition identifier value indicating a privilege setting of the current context, a process identifier value indicating whether the address is within shared address space, and an effective address comprising at least a portion of the particular address. In response to the virtual address not matching at least one entry within a TLB comprising at least one entry stored for at least one previous translation of at least one previous address, the TLB controller translates the virtual address into a real page number using at least one page table and adding a new entry to the TLB with the virtual address and the real page number, wherein each at least one entry within the TLB identifies a separate privilege setting from among a plurality of privilege settings and a separate indicator of whether the address is within the shared address space.

First claim

What is claimed is:

1. A system for managing translations, comprising:
a processor, coupled with a memory, and configured to perform the actions of:
for a current context in control of a processor requesting access to a particular address, specifying a virtual address with a logical partition identifier value indicating a privilege setting of the current context, a process identifier value indicating whether the address is within shared address space, and an effective address comprising at least a portion of the particular address; and
in response to the virtual address not matching at least one entry within a translation lookaside buffer comprising at least one entry stored for at least one previous translation of at least one previous address, translating the virtual address into a real page number using at least one page table and adding a new entry to the translation lookaside buffer with the virtual address and the real page number, wherein each at least one entry within the translation lookaside buffer identifies a separate privilege setting from among a plurality of privilege settings and a separate indicator of whether the address is within the shared address space.

2. The system according to claim 1 , wherein the processor is further configured to perform the actions of:
comparing the virtual address with each at least one entry within the translation lookaside buffer comprising the at least one entry stored for at least one previous translation of at least one previous address, wherein each entry comprises a translation logical partition identifier value indicating a privilege setting of the at least one previous context, a translation process identifier value indicating whether the address within the at least one previous context is within shared address space, and a translation effective address comprising at least a portion of at least one previous address for the at least one previous context.

3. The system according to claim 1 , wherein the processor is further configured to perform the actions of:
determining whether the privilege setting of the current context is set to a selected highest privilege mode from among a plurality of privilege modes;
responsive to the privilege setting of the current context set to the selected highest privilege mode, setting the logical partition identifier value to a clamped value, wherein the clamped value indicates that the privilege setting is the selected highest privilege mode, wherein the highest privilege mode allows the current context to access a total address space; and
responsive to the privilege setting of the current context not set to the selected highest privilege mode, setting the logical partition identifier value to an identifier for a particular logical partition from among a plurality of logical partitions managed by a hypervisor, wherein if the privilege mode of the current context is not set to the selected highest privilege mode, the current context has limited access to only a portion of the total address space allocated by the hypervisor to the particular logical partition.

4. The system according to claim 3 , wherein the processor is further configured to perform the actions of:
reading a machine state register setting for a hypervisor bit, wherein the machine state register setting for the hypervisor bit is set by the hypervisor when switching access to the current context, wherein the hypervisor bit is set to a first value to set the privilege setting to the selected highest privilege mode.

5. The system according to claim 1 , wherein the processor is further configured to perform the actions of:
determining whether the address is within the shared address space based on a setting of at least one bit within the effective address, wherein the setting of the at least one bit is specified for the identifying the shared address space as a portion of the total address space;
responsive to the setting of the at least one bit set to the shared address space, setting the process identifier value to a clamped value, wherein the clamped value indicates that effective address is directed to the shared address space, wherein a plurality of processes operating within a particular logical partition share access to the shared address space; and
responsive to the setting of the at least one bit not set to the shared address space, setting the process identifier value to an identifier for a particular process from among the plurality of processes operating within the particular logical partition.

6. The system according to claim 1 , wherein the processor is further configured to perform the actions of:
determining whether the privilege setting of the current context is set to access a most protected address space from among a total address space, wherein the most protected address space is only accessible if the current context is also set to a privilege setting of a selected highest privilege mode from among a plurality of privilege modes;
responsive to the privilege setting of the current context set to the most protected access space, setting the logical partition identifier value to a clamped value, wherein the clamped value indicates that the privilege setting is to the most protected address space; and
responsive to the privilege setting of the current context not set to the most protected address space, setting the logical partition identifier value to an identifier for a particular logical partition from among a plurality of logical partitions managed by a hypervisor, wherein the current context has limited access to only a portion of the total address space allocated by the hypervisor to the particular logical partition.

7. The system according to claim 1 , wherein the processor is further configured to perform the actions of:
determining whether the address is within the shared address space based on a setting of a first bit within the effective address, wherein the setting of the first bit is specified for the identifying the shared address space as a portion of the total address space;
responsive to the setting of the first bit set to the shared address space, setting the process identifier value to a first clamped value, wherein the first clamped value indicates that effective address is directed to the shared address space, wherein a plurality of processes operating within a particular logical partition share access to the shared address space, wherein if the current context is operating in a highest privilege setting the current context may access all of the total address space;
responsive to the setting of the first bit not set to the shared address space, determining whether the address is within hypervisor application space based on a setting of a second bit within the effective address, wherein the setting of the second bit is specified for distinguishing the hypervisor application space within a hypervisor logical partition from among a plurality of logical partitions from application space allocated across a remaining selection of the plurality of logical partitions;
responsive to the setting of the second bit set to the hypervisor application space, setting the process identifier value to a second clamped value different from the first clamped value, wherein the second clamped value indicates that effective address is directed to the hypervisor application space; and
responsive to the setting of the second bit not set to the hypervisor application space, setting the process identifier value to an identifier for a particular process from among the plurality of processes operating within the particular logical partition.

8. The system according to claim 1 , wherein the processor is further configured to perform the actions of:
determining whether the privilege setting

Assignees

• IBM

Inventors

• Bybell Anthony J
• Frey Bradly G
• Gschwind Michael K
• Herrenschmidt Benjamin
• Mackerras Paul

Classifications

• G06F2212/684

  TLB miss handling · CPC title

• G06F2212/151

  Emulated environment, e.g. virtual machine · CPC title

• G06F2212/656

  Address space sharing · CPC title

• G06F12/145

  the protection being virtual, e.g. for virtual blocks or segments before a translation mechanism · CPC title

• G06F2212/152

  Virtualized environment, e.g. logically partitioned system · CPC title