Hybrid bonding with air-gap structure

Patent metadata

Field	Value
Publication number	US-9312229-B2
Application number	US-201414302666-A
Country	US
Kind code	B2
Filing date	Jun 12, 2014
Priority date	Mar 15, 2013
Publication date	Apr 12, 2016
Grant date	Apr 12, 2016

Abstract

A package component includes a surface dielectric layer having a first planar surface, and a metal pad in the surface dielectric layer. The metal pad includes a diffusion barrier layer that includes sidewall portions, and a metallic material encircled by the sidewall portions of the diffusion barrier layer. The metallic material has a second planar surface level with the first planar surface. An air gap extends from the second planar surface of the metallic material into the metallic material. An edge of the air gap is aligned to an edge of the metallic material.

First claim

What is claimed is:

1. A package comprising:
a first package component comprising:
a first surface dielectric layer comprising a first planar surface; and
a first metal pad in the first surface dielectric layer, wherein the first metal pad comprises:
a first diffusion barrier layer comprising sidewall portions;
a first metallic material encircled by the sidewall portions of the first diffusion barrier layer, wherein the first metallic material comprises a second planar surface level with the first planar surface; and
an air gap extending from the second planar surface of the first metallic material into the first metallic material; and

a second package component overlapping the first package component, wherein the second package component comprises:
a second surface dielectric layer comprising a third planar surface bonded to the first planar surface; and
a second metal pad in the second surface dielectric layer, wherein the second metal pad has a fourth planar surface bonded to the second planar surface, and the air gap is overlapped by the second metal pad.

2. The package of claim 1 , wherein the air gap is comprised in an air gap ring extending from the second planar surface into the first metallic material, and wherein top portions of the sidewall portions of the first diffusion barrier layer are exposed to the air gap ring.

3. The package of claim 1 , wherein the second metal pad further comprises:
a second diffusion barrier layer comprising sidewall portions;
a second metallic material encircled by the sidewall portions of the second diffusion barrier layer; and
an additional air gap ring extending from the fourth planar surface into the second metallic material, wherein the additional air gap ring is encircled by the second diffusion barrier layer.

4. The package of claim 3 , wherein the additional air gap ring is joined to the air gap.

5. The package of claim 1 , wherein the sidewall portions of the first diffusion barrier layer comprise edges coplanar with the first planar surface and the second planar surface.

6. The package of claim 1 , wherein the first metallic material comprises copper, and the first surface dielectric layer comprises silicon oxide or silicon oxynitride.

7. The package of claim 1 , wherein the air gap stops at an intermediate level of the first metal pad.

8. A package comprising:
a first package component comprising:
a first surface dielectric layer; and
a first metal pad in the first surface dielectric layer, wherein the first metal pad comprises a first surface and a second surface opposite to the first surface;

a first air gap extending from the first surface of the first metal pad into the first metal pad, wherein the first air gap stops at an intermediate level between the first surface and the second surface; and
a second package component comprising:
a second surface dielectric layer bonded to a first surface of the first surface dielectric layer; and
a second metal pad in the second surface dielectric layer, wherein the second metal pad is bonded to the first metal pad; and

a second air gap extending from a surface of the second metal pad into the second metal pad, wherein the second air gap is joined to the first air gap.

9. The package of claim 8 , wherein the first air gap forms a ring.

10. The package of claim 8 , wherein the first metal pad comprises:
a metallic material, with the first surface comprising a surface of the metallic material; and
a diffusion barrier layer encircling the metallic material, wherein inner surfaces of the diffusion barrier layer contact edges of the metallic material, and wherein the diffusion barrier layer is exposed to the first air gap.

11. The package of claim 8 , wherein the first air gap has a depth between about 0.3 μm and about 0.1 μm.

12. The package of claim 8 , wherein the second air gap extends to a depth that is smaller than a distance between the first surface and the second surface of the first metal pad.

13. The package of claim 12 , wherein the first air gap and the second air gap in combination form an integrated air gap ring.

14. The package of claim 12 , wherein the first metal pad comprises copper and the first surface dielectric layer comprises silicon oxynitride or silicon oxide.

15. A method comprising:
forming a first package component comprising:
forming a first surface dielectric layer at a surface of an initial structure of the first package component;
etching the first surface dielectric layer to form an opening;
filling the opening with conductive materials; and
performing a Chemical Mechanical Polish (CMP) to remove excess portions of the conductive materials, wherein remaining portions of the conductive materials form a first metal pad, with a first trench ring generated in the first metal pad and adjacent to peripherals of the first metal pad; and

bonding the first package component to a second package component, wherein the first metal pad is bonded to a second metal pad of the second package component, and wherein the first surface dielectric layer is bonded to a second surface dielectric layer of the second package component.

16. The method of claim 15 , wherein the CMP comprises:
a first CMP step, wherein during the first CMP step, a first polishing rate of the conductive materials is higher than a second polishing rate of the first surface dielectric layer; and
a second CMP step after the first CMP step, wherein during the second CMP step, a third polishing rate of the conductive materials is substantially equal to a fourth polishing rate of the first surface dielectric layer, and wherein the first trench ring is deepened in the second CMP step.

17. The method of claim 16 , wherein the conductive materials comprise copper, the first surface dielectric layer comprises silicon oxynitride, and wherein the second CMP step of the CMP is performed using a slurry comprising K 2 SO 4 , citric acid, or benzotriazole.

18. The method of claim 15 , wherein the CMP is configured to generate the first trench ring that has a depth between about 0.3 μm and about 0.1 μm.

19. The method of claim 15 , wherein the second metal pad of the second package component further comprises a second trench ring extending partially into the second metal pad.

20. The method of claim 19 , wherein the bonding the first package component to the second package component further comprises aligning the first trench ring to the second trench ring, wherein after the bonding, the first trench ring and the second trench ring are joined with each other.

Assignees

• Taiwan Semiconductor Mfg

Inventors

• Chen Szu-Ying
• Yaung Dun-Nian

Classifications

• H10W90/792

  between multiple chips · CPC title

• H10W90/20

  Configurations of stacked chips · CPC title

• H10W80/743

  having disposition changed during the connecting · CPC title

• H10W80/721

  having structure or size changed during the connecting · CPC title

• H10W80/327

  characterised by the direct bonding of insulating parts, e.g. of silicon oxide layers · CPC title