Inspection method and device therefor

Patent metadata

Field	Value
Publication number	US-9311697-B2
Application number	US-201113639103-A
Country	US
Kind code	B2
Filing date	Apr 1, 2011
Priority date	Apr 6, 2010
Publication date	Apr 12, 2016
Grant date	Apr 12, 2016

Abstract

Disclosed is a method of inspecting an object to be inspected in a semiconductor manufacturing process, for resolving the problem to increase defect detection sensitivity. An image capture means is used to image capture a designated area of the object to be inspected; a defect is detected in the captured image; a circuit pattern is recognized from the captured image; a characteristic value is computed, relating to an image tone and shape, from the detected defect; a characteristic value is computed, relating to the image tone and shape, from the recognized circuit pattern; either a specified defect or circuit pattern is filtered and extracted from the detected defect and the recognized circuit pattern; a mapping characteristic value is determined from the characteristic value of either the filtered and extracted specified defect or circuit pattern; and the distribution of the determined characteristic values is displayed onscreen in a map format.

First claim

The invention claimed is:

1. An inspection method for inspecting an inspection target, the method comprising:
capturing an image of a designated area of the inspection target using an image capturing device;
detecting defects by creating a defect detection result image of the designated area based on the captured image;
recognizing circuit patterns by creating a circuit pattern recognition result image of the designated area based on the captured image, the circuit pattern recognition result image being different than the defect detection result image;
computing characteristic values related to the grey value of the captured image and shapes from the detected defects;
computing characteristic values related to the grey value of the captured image and shapes from the recognized circuit patterns;
extracting circuit patterns by filtering from the recognized circuit patterns;
determining characteristic values to be mapped among the characteristic values of the circuit patterns extracted by filtering; and
displaying a distribution of the determined characteristic values on a screen in a map format.

2. The inspection method according to claim 1 , wherein the extracting by filtering comprises receiving filtering conditions via a user interface.

3. The inspection method according to claim 1 , wherein the step of determining characteristic values to be mapped comprises receiving the characteristic values via a user interface.

4. The inspection method according to claim 1 , wherein the displaying on the screen in a map format comprises displaying a result of aggregating the characteristic values determined in the step of determining the characteristic values to be mapped for each of plural chips formed on the inspection target or for each region in the chip in a map format.

5. The inspection method according to claim 1 , wherein the map format displayed on the screen is a wafer map.

6. The inspection method according to claim 1 , wherein the map format displayed on the screen is a map in a chip.

7. The inspection method according to claim 1 , wherein the extracting by filtering comprises filtering using filtering conditions selected to extract the circuit patterns designated on the screen.

8. A device for inspecting an inspection target, comprising:
an image capture device configured to capture an image of a designated area of the inspection target;
a detector configured to detect defects by creating a defect detection result image of the designated area based on the captured image;
a recognizer configured to recognize circuit patterns by creating a circuit pattern recognition result image of the designated area based on the captured image, the circuit pattern recognition result image being different than the defect detection result image;
a defect characteristic value computer configured to compute characteristic values related to the grey value of the captured image and shapes from the detected defects;
a circuit pattern characteristic value computer configured to compute characteristic values related to the grey value of the captured image and shapes from the recognized circuit patterns;
an extractor configured to extract circuit patterns by filtering from the defects detected by the detector and the circuit patterns recognized by the recognizer;
an characteristic value determiner configured to determine characteristic values to be mapped among the characteristic values of the circuit patterns extracted by filtering by the extractor; and
a display unit configured to display a distribution status of the characteristic values determined by the determiner on a screen in a map format.

9. The inspection device according to claim 8 , wherein conditions filtered by the extractor are those set on the screen.

10. The inspection device according to claim 8 , wherein the characteristic values to be mapped determined by the characteristic value determiner are those set on the screen.

11. The inspection device according to claim 8 , wherein the display unit is configured to display in a map format a result of aggregating the characteristic values determined by the characteristic value determiner to be mapped for each of plural chips formed on the inspection target or for each region in the chip.

12. The inspection device according to claim 8 , wherein the map format displayed on the screen by the display unit is a wafer map.

13. The inspection device according to claim 8 , wherein the map format displayed on the screen by the display unit is a map in a chip.

14. The inspection device according to claim 8 , wherein the conditions filtered by the extractor are those set so as to extract the circuit patterns designated on the screen.

15. The inspection device according to claim 8 , wherein the image capture device comprises:
an energy source configured to irradiate a sample; and
one or more detectors configured to detect electrons reflected from the sample.

16. An inspection method for inspecting an inspection target, the method comprising:
capturing an image of a designated area of the inspection target using an image capturing device;
detecting defects by creating a defect detection result image of the designated area based on the captured image;
recognizing circuit patterns by creating a circuit pattern recognition result image of the designated area based on the captured image, the circuit pattern recognition result image being different than the defect detection result image;
computing characteristic values related to the grey value of the captured image and shapes from the detected defects;
computing characteristic values related to the grey value of the captured image and shapes from the recognized circuit patterns;
extracting specific defects or circuit patterns by filtering from the detected defects and recognized circuit patterns;
determining characteristic values to be mapped among the characteristic values of the specific defects or circuit patterns extracted by filtering; and
displaying a distribution of the determined characteristic values on a screen in a map format,
wherein recognizing circuit patterns comprises extracting an outline of the circuit patterns based on a change in a grey value and recognizing an inner region of the circuit patterns based on the grey value and a changing direction of the grey value.

17. A device for inspecting an inspection target, comprising:
an image capture device configured to capture an image of a designated area of the inspection target;
a detector configured to detect defects by creating a defect detection result image of the designated area based on the captured image;
a recognizer configured to recognize circuit patterns by creating a circuit pattern recognition result image of the designated area based on the captured image, the circuit pattern recognition result image being different than the defect detection result image;
a defect characteristic value computer configured to compute characteristic values related to the grey value of the captured image and shapes from the detected defects;
a circuit pattern characteristic value computer configured to compute characteristic values related to the grey value of the captured image and shapes from the recognized circuit patterns;
an extractor configured to extract specific defects or circuit patterns by filtering from the defects detected by the detector and the circuit patterns recognized by the recognizer;
an characteristic value determiner configured to determine characteristic values to be mapped among the characteristic values of the specific defects or ci

Assignees

• Harada Minoru
• Nakagaki Ryo
• Hirai Takehiro
• Hosoya Naoki
• Hitachi High Tech Corp

Inventors

• Harada Minoru
• Nakagaki Ryo
• Hirai Takehiro
• Hosoya Naoki

Classifications

• H10P74/203

  Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

• H10P74/00 Primary

  Testing or measuring during manufacture or treatment of wafers, substrates or devices · CPC title

• G06T7/001 Primary

  using an image reference approach · CPC title

• G06T2207/10061

  from scanning electron microscope · CPC title

• G06T7/0004 Primary

  Industrial image inspection · CPC title