Interconnect layer and method for manufacturing the same
US-2024420994-A1 · Dec 19, 2024 · US
US9297067B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9297067-B2 |
| Application number | US-201314137320-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 20, 2013 |
| Priority date | Dec 20, 2013 |
| Publication date | Mar 29, 2016 |
| Grant date | Mar 29, 2016 |
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An amorphous silicon (a-Si) dielectric for superconducting electronics is fabricated with reduced loss tangent by fluorine passivation throughout the bulk of the layer. Complete layers or thinner sub-layers of a-Si are formed by physical vapor deposition at low temperatures (<350 C, e.g. ˜200 C) to prevent reaction with superconducting materials, then exposed to fluorine. The fluorine may be a component of a gas or plasma, or it may be a component of an interface layer. The fluorine is driven into the a-Si by heat (e.g., <350 C) or impact to passivate defects such as dangling bonds.
Opening claim text (preview).
What is claimed is: 1. A method, comprising: providing a substrate, wherein a temperature of the substrate is less than about 350 C; forming a first superconducting layer on the substrate; forming a first amorphous silicon layer over the first superconducting layer; exposing the first amorphous silicon layer to a source of fluorine; and forming a second amorphous silicon layer over the first amorphous silicon layer; wherein the temperature of the substrate is less than about 350 C during each of the forming, forming, exposing, and forming steps; wherein the first amorphous silicon layer and the second amorphous silicon layer are formed by a process comprising physical vapor deposition. 2. The method of claim 1 , wherein at least one of the first amorphous silicon layer or the second amorphous silicon layer is formed at a substrate temperature less than about 200 C. 3. The method of claim 1 , wherein at least one of the first amorphous silicon layer or the second amorphous silicon layer is formed in an oxygen-free environment. 4. The method of claim 1 , wherein at least one of the first amorphous silicon layer or the second amorphous silicon layer further comprises hydrogen. 5. The method of claim 1 , wherein a thickness of at least one of the first amorphous silicon layer or the second amorphous silicon layer is between 50 nm and 300 nm. 6. The method of claim 1 , wherein a thickness of at least one of the first amorphous silicon layer or the second amorphous silicon layer is greater than 300 nm. 7. The method of claim 1 , wherein the source of the fluorine comprises a gas or a plasma-activated species. 8. The method of claim 1 , wherein the source of the fluorine comprises at least one of fluorine ions, fluorine radicals, NF 3 , or F 2 . 9. The method of claim 1 , further comprising forming a first interface layer over the first amorphous silicon layer before the second amorphous silicon layer is formed; wherein the first interface layer comprises the source of the fluorine. 10. The method of claim 9 , wherein the first interface layer comprises adsorbed material. 11. The method of claim 9 , wherein the first interface layer is formed by physical vapor deposition, chemical vapor deposition, or atomic layer deposition. 12. The method of claim 9 , wherein a thickness of the first interface layer is between 0.1 nm and 10 nm. 13. The method of claim 1 , wherein the first amorphous silicon layer is formed on the substrate at a first temperature, and further comprising heating the substrate to a second temperature higher than the first temperature after the first amorphous silicon layer is formed. 14. The method of claim 13 , wherein the second temperature is between about 100 C and about 350 C. 15. The method of claim 13 , wherein the heating is performed after the second amorphous silicon layer is formed. 16. The method of claim 1 , wherein the fluorine is incorporated into the first amorphous silicon layer by impacts of ions or radicals on a surface of the first amorphous silicon layer. 17. The method of claim 1 , wherein the substrate is kept in a controlled environment during the forming of the first amorphous silicon layer, the exposing of the first amorphous silicon layer to the source of fluorine, the incorporating of the fluorine into the first amorphous silicon layer, and the forming of the second amorphous silicon layer. 18. The method of claim 1 , wherein the first superconducting layer comprises aluminum, niobium, a superconducting ceramic, or an organic superconductor. 19. A superconducting device, comprising: a structure, wherein the structure comprises a superconducting material; and an insulating layer in contact with the structure on at least one side; wherein the insulating region comprises amorphous silicon and fluorine; and wherein the fluorine is present in a bulk region of the insulating layer at least 40 nm from a surface of the insulating layer. 20. The superconducting device of claim 19 , wherein a loss tangent of the insulating layer is less than 0.0002 at 200 GHz at an operating temperature of 0.1 Kelvin.
Diffusion for doping of insulating layers · CPC title
containing silicon · CPC title
by exposure to a plasma · CPC title
by exposure to a gas or vapour · CPC title
by introduction of substances into an already-existing insulating layer · CPC title
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