Through substrate via structures and methods of forming the same

US9263382B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9263382-B2
Application numberUS-201414334100-A
CountryUS
Kind codeB2
Filing dateJul 17, 2014
Priority dateOct 13, 2011
Publication dateFeb 16, 2016
Grant dateFeb 16, 2016

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A structure includes a substrate, and an interconnect structure over the substrate. The structure further includes a through-substrate-via (TSV) extending through the interconnect structure and into the substrate, the TSV comprising a conductive material layer. The structure further includes a dielectric layer having a first portion over the interconnect structure and a second portion within the TSV, wherein the first portion and the second portion comprise a same material. The conductive material layer includes a first section separated from substrate by the second portion of the dielectric layer. The conductive material layer further includes a second section over a top surface of the second portion of the dielectric layer. The conductive material layer further includes a third section over the second section, wherein the third section has a width greater than a width of the second section.

First claim

Opening claim text (preview).

What is claimed is: 1. A structure comprising: a substrate; an interconnect structure over the substrate; a through-substrate-via (TSV) extending through the interconnect structure and into the substrate, the TSV comprising a conductive material layer; a metal layer over the interconnect structure, wherein a top surface of the metal layer is substantially level with a top surface of the TSV; and a dielectric layer having a first portion over the interconnect structure and a second portion within the TSV, wherein the first portion and the second portion comprise a same material, wherein the conductive material layer comprises: a first section separated from substrate by the second portion of the dielectric layer, a second section over a top surface of the second portion of the dielectric layer, and a third section over the second section, wherein the third section has a width greater than a width of the second section. 2. The structure of claim 1 , wherein the top surface of the second portion of the dielectric layer is spaced from a top surface of the interconnect structure by a distance ranging from about 2,000 angstroms to about 20,000 angstroms. 3. The structure of claim 1 , wherein the metal layer is spaced from the TSV. 4. The structure of claim 3 , wherein the metal layer is within the first portion of the dielectric layer. 5. The structure of claim 1 , further comprising an isolation structure in the substrate, wherein the TSV extends through the isolation structure. 6. The structure of claim 5 , wherein the second portion of the dielectric layer is between the isolation structure and the first segment of the conductive material layer. 7. The structure of claim 5 , wherein a bottom portion of the second portion of the dielectric layer is farther from a top surface of the substrate than a bottom portion of the isolation structure. 8. A structure comprising: a substrate; an isolation structure in the substrate; a through-substrate-via (TSV) extending through the isolation structure and into the substrate, wherein a bottom surface of the TSV is below a bottom surface of the isolation structure; a dielectric layer having a first portion over the substrate and a second portion within the TSV, wherein the first portion and the second portion comprise a same material, a top surface of the second portion is above the isolation structure, and the second portion of the dielectric layer contacts the isolation structure, and wherein the TSV extends over the top surface of the second portion of the dielectric layer. 9. The structure of claim 8 , wherein a bottom surface of the second portion of the dielectric layer is below the bottom surface of the isolation structure. 10. The structure of claim 8 , wherein the second portion of the dielectric layer is between the TSV and the isolation structure. 11. The structure of claim 8 , wherein the TSV comprises a conductive material layer and a barrier layer between the conductive material layer and the substrate. 12. The structure of claim 11 , wherein the barrier layer is between the conductive material layer and the second portion of the dielectric layer. 13. The structure of claim 11 , further comprising a metal layer separated from the TSV, wherein a bottom surface of the metal layer is above the top surface of the second portion of the dielectric layer. 14. The structure of claim 13 , wherein the metal layer comprises: a conductive material, wherein a material of the conductive material is a same material as the conductive material layer, and a barrier layer surrounding the conductive material, wherein a material of the barrier layer of the metal layer is a same material as the barrier layer of the TSV. 15. A method of forming a structure, the method comprising: forming a through-substrate-via (TSV) opening in a substrate, wherein the substrate comprises an isolation structure, and the TSV opening extends through the isolation structure; depositing a dielectric layer on the substrate, wherein the dielectric layer lines the TSV opening, patterning and etching the dielectric layer to form a wider opening at one end of the TSV opening in a first portion of the dielectric layer, and to define a second portion of the dielectric layer in the TSV opening, filling the TSV opening with a conductive material layer, wherein the conductive material layer in the TSV opening extends over a top surface of the second portion of the dielectric layer closest to the first portion of the dielectric layer; and removing the conductive material layer outside the wider opening, wherein removing the conductive material outside the wider opening comprises maintaining the first portion of the dielectric layer. 16. The method of claim 15 , wherein filling the TSV opening with the conductive material layer comprises forming: a first segment of the conductive material layer separated from the substrate by the second portion of the dielectric layer; a second segment of the conductive material layer over the top surface of the second portion of the dielectric layer closest to the first portion of the dielectric layer; and a third segment of the conductive material layer over the second segment of the conductive material layer, wherein a width of the third segment is greater than a width of the second segment. 17. The method of claim 15 , wherein patterning and etching the dielectric layer comprises completely removing the dielectric layer from sidewalls of the TSV opening between the first portion and the second portion. 18. The method of claim 15 , further comprising forming a metal layer over the substrate, wherein the metal layer is in the first portion of the dielectric layer. 19. The method of claim 18 , wherein forming the metal layer comprises forming a bottom surface of the metal layer above the top surface of the second portion of the dielectric layer closest to the first portion of the dielectric layer. 20. The method of claim 15 , wherein depositing the dielectric layer comprises forming a bottom surface of the dielectric layer below a bottom surface of the isolation structure.

Assignees

Inventors

Classifications

  • comprising use of blind vias during the manufacture · CPC title

  • TSVs extending from the semiconductor wafer into back-end-of-line layers · CPC title

  • with via interconnections · CPC title

  • Structures or relative sizes of bond pads · CPC title

  • Bond pads having multiple stacked layers · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9263382B2 cover?
A structure includes a substrate, and an interconnect structure over the substrate. The structure further includes a through-substrate-via (TSV) extending through the interconnect structure and into the substrate, the TSV comprising a conductive material layer. The structure further includes a dielectric layer having a first portion over the interconnect structure and a second portion within th…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg
What technology area does this patent fall under?
Primary CPC classification H10W20/023. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 16 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).