Low consumption logic circuit with mechanical switches

Patent metadata

Field	Value
Publication number	US-9257981-B2
Application number	US-201414452698-A
Country	US
Kind code	B2
Filing date	Aug 6, 2014
Priority date	Aug 14, 2013
Publication date	Feb 9, 2016
Grant date	Feb 9, 2016

Abstract

Adiabatic logic circuit having a first and a second inputs, a first and a second outputs and at least one supply and synchronization input (Phi), with this circuit comprising:
a first logic device comprising at least one first microelectromechanical and/or nanoelectromechanical switch, referred to as first mechanical switch, controlled by a first input and connected to the first output and to the supply and synchronization input, a second logic device opposite the first logic device comprising at least one second microelectromechanical or nanoelectromechanical switch, referred to as second mechanical switch, controlled by the second input and connected to the second output and to the supply and synchronization input, first and second devices for partial discharging connected respectively between the first output and the supply and synchronization input and between the second output and the supply and synchronization input.

First claim

The invention claimed is:

1. Adiabatic logic circuit having at least one first and one second inputs, one first and one second outputs, and at least one supply and synchronisation input, with the adiabatic logic circuit comprising:
a first logic device comprising at least one first microelectromechanical and/or nanoelectromechanical switch, referred to as first logic switch, at least partially controlled by the first input and connected to the first output and to the supply and synchronisation input;
a second logic device referred to as complementary providing a complementary logic function of the first logic device comprising at least one second microelectromechanical and/or nanoelectromechanical switch, referred to as second logic switch, at least partially controlled by the second input and connected to the second output and to the supply and synchronisation input; and
first and second devices for discharging connected respectively between the first output and the supply and synchronisation input and between the second output and the supply and synchronisation input, said first and second devices for discharging configured to provide a discharge at least partially of the first and second outputs, said first and second devices for discharging comprising respectively at least one switch,
wherein the first logic device and the second logic device are directly connected to the supply and synchronisation input.

2. Adiabatic logic circuit according to claim 1 , wherein the switches of the first and second devices for discharging are hysteresis cycle switches.

3. Adiabatic logic circuit according to claim 1 , wherein the first and the second device for discharging comprise respectively at least one microelectromechanical and/or nanoelectromechanical switch, referred to as discharge switch.

4. Adiabatic logic circuit according to claim 1 , wherein the first output is connected to the ground by the intermediary of a third complementary logic device of the first logic device and controlled by the second input and the second output is connected to the ground by the intermediary of a fourth complementary logic device of the second logic device and controlled by the first input.

5. Adiabatic logic circuit according to claim 4 , wherein the third complementary logic device comprises a first microelectromechanical and/or nanoelectromechanical connection switch to the ground, said first connection switch to the ground being controlled in such a way as to be in a state opposite that of the first logic switch, and the fourth complementary logic device comprises a second microelectromechanical and/or nanoelectromechanical connection switch to the ground, said second connection switch to the ground being controlled in such a way as to be in a state opposite that of the second logic switch.

6. Adiabatic logic circuit according to claim 5 , wherein the first and second connection switches to the ground are configured to be controlled by electrostatic forces, magnetic forces, or piezoelectric forces.

7. Adiabatic logic circuit according to claim 1 , wherein all or a portion of the first and the second logic switches are bistable switches.

8. Adiabatic logic circuit according to claim 1 , wherein the first and second devices for discharging are configured to be controlled respectively by the first output and the second output.

9. Adiabatic logic circuit according to claim 1 , wherein the at least one supply and synchronisation input comprises at least one first synchronisation input and one second synchronisation input, and with each of the first and second devices for discharging comprising at least three microelectromechanical and/or nanoelectromechanical switches,
wherein one of the three switches of the first device for discharging is configured to perform the connection between the first output and the supply and synchronisation input, another from among the three switches of the first device for discharging is controlled by the first synchronisation input in such a way as to maintain the connection between the first output and the supply and synchronisation input until the first output is fully discharged, by maintaining said connection switch as a conductor, and the second synchronisation input provides the connection between the first output and the supply and synchronisation input by closing another of the three switches of the first device for discharging in an inactive phase of the logic circuit, and
wherein one of the three switches of the second device for discharging, referred to as connection switch, is configured to perform the connection between the second output and the supply and synchronisation input, another from among the three switches of the second device for discharging is controlled by the first synchronisation input in such a way as to maintain the connection between the second output and the supply and synchronisation input until the second output is fully discharged, by maintaining the connection switch as a conductor, and the second synchronisation input provides the connection between the second output and the supply and synchronisation input by closing another of the three switches of the second logic discharge device in an inactive phase of the logic circuit.

10. Adiabatic logic circuit according to claim 1 ,
wherein the first logic switch of the first logic device forms a portion of the first device for discharging, said first logic switch being configured to be controlled in terms of closing and opening, said first logic switch being configured to be controlled in such a way as to provide for the full discharge of the first output, and
wherein the second logic switch of the second logic device forms a portion of the second device for discharging, said second logic switch being configured to be controlled in terms of closing and opening, said second logic switch being configured to be controlled in such a way as to provide for the full discharge of the second output.

11. Adiabatic logic circuit according to claim 10 , comprising a synchronisation input that is configured to control two additional switches of the first and second devices for discharging in such a way that said synchronisation input maintains one or the other of the additional switches closed providing the connection between the first output or the second output respectively and the supply and synchronisation input, in an inactive phase of the logic circuit.

12. Adiabatic logic circuit according to claim 1 , wherein the first and second logic switches, and the first and second discharge switches, are configured to be controlled by electrostatic forces, magnetic forces, or piezoelectric forces.

13. A logic circuit comprising at least one adiabatic logic circuit according to claim 1 .

14. An integrated circuit comprising the logic circuit according to claim 13 , comprising at least one first and one second logic circuits, with the first output of the first logic device of the first logic circuit configured to apply an input signal to the first input of the first logic device of the second logic circuit, and with the second output of the second logic device of the first logic circuit configured to apply an input signal to the second input of the second logic device of the second logic circuit.

Assignees

• Commissariat Energie Atomique
• Commissariat à l'énergie atomique et aux énergies alternatives

Inventors

• Fanet Herve
• Belleville Marc

Classifications

• H03K19/0019 Primary

  by energy recovery or adiabatic operation · CPC title

• B81B7/02

  containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS] (B81B7/04 takes precedence) · CPC title

• B81B2201/01

  Switches · CPC title