Configurable power domain and method

US9912335B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9912335-B2
Application numberUS-201514794485-A
CountryUS
Kind codeB2
Filing dateJul 8, 2015
Priority dateJul 8, 2015
Publication dateMar 6, 2018
Grant dateMar 6, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Aspects of this disclosure are directed to level-shifting approaches with communications between respective circuits. As may be implemented in accordance with one or more embodiments characterized herein, a voltage level of communications passed between respective circuits are selectively shifted. Where the respective circuits operate under respective power domains that are shifted in voltage range relative to one another, the voltage level of the communications is shifted. This approach may, for example, facilitate power-savings for stacked circuits in which a low-level voltage of one circuit is provided as a high-level voltage for another circuit. When the respective circuits operate under a common power domain, the communications are passed directly between the respective circuits (e.g., bypassing any level-shifting, and facilitating fast communication).

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus comprising: a first circuit configured and arranged to operate under a first power domain having a first voltage range; a second circuit configured and arranged to operate under a second power domain having a second voltage range; and a level shifter circuit connected to the first circuit and to the second circuit, the level shifter circuit being configured and arranged to: detect a voltage range of the first power domain, detect a voltage range of the second power domain, and provide communications between the first and second circuit by, converting a voltage level of a first signal received from one of the first and second circuits to a different voltage level that corresponds to the first or the second voltage range of the other one of the first and second circuits in response to the detected voltage ranges of the first and second power domains being different, and thereafter communicating the first signal to the other one of the first and second circuits, and communicating a second signal directly between the first and second circuits in response to the detected voltage ranges of the first and second power domains being the same. 2. The apparatus of claim 1 , wherein the level shifter circuit is configured and arranged to: in a first stacked mode, convert the voltage level of the first signal in response to the detected voltage ranges of the first and second power domains indicating that the first circuit operates between first and second voltage levels and that the second circuit operates between the second and a third voltage level, and in a second flat mode, communicate the second signal directly between the first and second circuits without converting the voltage level of the second signal in response to the detected voltage ranges of the first and second power domains indicating that both the first and second circuits operate between common voltage levels. 3. The apparatus of claim 2 , wherein the level shifter circuit includes: a first circuit path coupled to receive the first signal, the first circuit path including a first comparison circuit and a voltage level shifting circuit configured and arrange to shift the voltage level of the first signal and to output the first signal with a shifted voltage level to the other one of the first and second circuits, the first comparison circuit being configured and arranged to pass the first signal to the voltage level shifting circuit in response to the detected voltage ranges being different, and a second circuit path coupled to receive the second signal and including a second comparison circuit configured and arranged to output the second signal to the other one of the first and second circuits at a voltage level at which the second signal is received, in response to the detected voltage ranges of the first and second power domains being the same. 4. The apparatus of claim 3 , further including a multiplexer having first and second inputs respectively connected to receive the outputs of the first and second circuit paths, the multiplexer being configured and arranged to: provide an output signal based on the output of the first circuit path in response to the detected voltage ranges of the first and second power domains being different, and provide an output signal based on the output of the second circuit path in response to the detected voltage ranges of the first and second power domains being the same. 5. The apparatus of claim 4 , wherein each of the first circuit and the second circuit are respectively coupled between high and low voltage rails, further including interface circuit including a switching circuit and configured and arranged to: in a first stack mode, couple the low voltage rail of the first circuit to the high voltage rail of the second circuit, and in a second flat mode, couple the high voltage rail of the first circuit to the high voltage rail of the second circuit, and couple the low voltage rail of the first circuit to the low voltage rail of the second circuit. 6. The apparatus of claim 1 , wherein each of the first circuit and the second circuit are respectively coupled between high and low voltage rails, further including a switching circuit configured and arranged to: in a first power mode, couple the low voltage rail of the first circuit to the high voltage rail of the second circuit, and in a second power mode, couple the high voltage rail of the first circuit to the high voltage rail of the second circuit, and couple the low voltage rail of the first circuit to the low voltage rail of the second circuit. 7. The apparatus of claim 1 , wherein the level shifter circuit includes: a range detection circuit configured and arranged to detect the voltage ranges of the first and second power domains, a shift circuit configured and arranged to convert voltage levels of input signals, including the first and second signals, a bypass circuit configured and arranged to provide the input signals, including the first and second signals, for passing between the first and second circuits at a common voltage level, and a multiplexer configured and arranged to select an output of one of the shift circuit and the bypass circuit based on the voltage ranged detected by the range detection circuit. 8. The apparatus of claim 1 , wherein the first power domain operates between a first high voltage level and a first low voltage level that is lower than the first high voltage level, the second power domain operates between a second high voltage level and a second low voltage level that is lower than the second high voltage level, the level shifter circuit is configured and arranged to detect the voltage ranges of the first and second power domains by: detecting that the first and second power domains operate over the same voltage rage in response to the first low voltage level being unequal to the second high voltage level, and detecting that the first and second power domains operate over different voltage ranges shifted relative to one another in response to first low voltage level being equal to the second high voltage level. 9. The apparatus of claim 1 , wherein at least one of the first circuit and the second circuit includes a memory circuit. 10. An apparatus comprising: a first circuit configured and arranged to operate under a first power domain having a first voltage range; a second circuit configured and arranged to operate under a second power domain having a second voltage range; and an interface circuit connected to the first circuit and to the second circuit, the interface circuit being configured and arranged to: in a first mode and responsive to the first voltage range being different than the second voltage range, convert a voltage level of a first signal passed between the first circuit and the second circuit, and in a second mode and responsive to the first and second circuits operating over a common voltage range, communicate a second signal directly between the first circuit and the second circuit, the second signal having a voltage level within the common voltage range. 11. The apparatus of claim 10 , wherein the first circuit operates between a first high power rail and a first low power rail that operates at a voltage level that is lower than a voltage level of the first high power rail, the second circuit operates between a second high power rail and a second low power rail that operates at a voltage level that is lower than a voltage level of the second high power rail, and the interface circuit is configured and arranged to: in a first mode, couple the first low power rail to the second high power rail, thereby recycling power from

Assignees

Inventors

Classifications

  • Power saving characterised by the action undertaken · CPC title

  • Interface arrangements · CPC title

  • by energy recovery or adiabatic operation · CPC title

  • Coupling arrangements; Interface arrangements (interface arrangements for digital computers G06F3/00, G06F13/00) · CPC title

  • Power management, i.e. event-based initiation of a power-saving mode · CPC title

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Frequently asked questions

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What does patent US9912335B2 cover?
Aspects of this disclosure are directed to level-shifting approaches with communications between respective circuits. As may be implemented in accordance with one or more embodiments characterized herein, a voltage level of communications passed between respective circuits are selectively shifted. Where the respective circuits operate under respective power domains that are shifted in voltage r…
Who is the assignee on this patent?
Nxp Bv
What technology area does this patent fall under?
Primary CPC classification H03K19/018507. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 06 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).