Silicon wafer and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-9243345-B2
Application number	US-201414518594-A
Country	US
Kind code	B2
Filing date	Oct 20, 2014
Priority date	Mar 25, 2009
Publication date	Jan 26, 2016
Grant date	Jan 26, 2016

Abstract

A method of manufacturing a silicon wafer provides a silicon wafer which can reduce the precipitation of oxygen to prevent a wafer deformation from being generated and can prevent a slip extension due to boat scratches and transfer scratches serving as a reason for a decrease in wafer strength, even when the wafer is provided to a rapid temperature-rising-and-falling thermal treatment process.

First claim

The invention claimed is:

1. A method of manufacturing a silicon epitaxial wafer which is provided to a semiconductor device manufacturing process having a thermal treatment process of which the highest temperature ranges from 1050° C. to the melting point of silicon and of which the temperature rising and falling rate ranges from 150° C./sec to 10000° C./sec, the method comprising:
an epitaxial process of causing an epitaxial layer to grow on the surface of a substrate, which is doped with boron so as to have resistivity of 0.02 Ωcm to 1 kΩcm and of which the initial oxygen concentration Oi is in the range of 14.0×10 17 to 22×10 17 atoms/cm 3 ASTM F 121, 1970-1979 published by American Society for Testing and Materials International); and
an oxygen precipitation nuclei dissolution process of treating a wafer in the treatment temperature range of 1150° C. to 1300° C., the retention time range of 5 sec to 1 min, and the temperature-falling rate range of 10° C./sec to 0.1° C./sec,
wherein the oxygen precipitation nuclei dissolution process is performed before or after the epitaxial process,
the thermal treatment process is applied to only an outermost surface layer of the silicon epitaxial wafer,
the oxygen precipitates density is equal to or less than 5×10 4 pcs/cm 2 in the silicon epitaxial wafer, and
the wafer includes a front surface and back surface, both having a flat main surface, a front sloped chamfered portion having an angle θ1, which is in a range of from 10° to 50°, a back sloped chamfered portion having an angle θ2, which is in a range of from 10° to 30°, and front and back curved portions, which connect the front and back chamfered portions to a peripheral edge of the wafer.

2. A method of manufacturing a silicon epitaxial wafer which is provided to a semiconductor device manufacturing process having a thermal treatment process of which the highest temperature ranges from 1050° C. to the melting point of silicon and of which the temperature rising and falling rate ranges from 150° C./sec to 10000° C./sec, the method comprising:
an epitaxial process of causing an epitaxial layer to grow on the surface of a substrate, which is doped with nitrogen of 1×10 13 to 5×10 14 atoms/cm 3 ; and
an oxygen precipitation nuclei dissolution process of treating a wafer in the treatment temperature range of 1200° C. to 1300° C., the retention time range of 5 sec to 1 min, and the temperature-falling rate range of 10° C./sec to 0.1° C./sec after the epitaxial process,
wherein the thermal treatment process is applied to only an outermost surface layer of the silicon epitaxial wafer,
the oxygen precipitates density is equal to or less than 5×10 4 pcs/cm 2 in the silicon epitaxial wafer, and
the wafer includes a front surface and back surface, both having a flat main surface, a front sloped chamfered portion having an angle θ1, which is in a range of from 10° to 50°, a back sloped chamfered portion having an angle θ2, which is in a range of from 10° to 30°, and front and back curved portions, which connect the front and back chamfered portions to a peripheral edge of the wafer.

3. The method of manufacturing a silicon epitaxial wafer according to claim 1 , wherein the treatment atmosphere in the oxygen precipitation nuclei dissolution process is set to an atmosphere of non-oxidizing gas not containing nitrogen.

4. The method of manufacturing a silicon epitaxial wafer according to claim 1 , wherein the treatment atmosphere in the oxygen precipitation nuclei dissolution process is set to a mixed atmosphere of non-oxidizing gas not containing 1% or more of nitrogen and oxygen gas.

5. A silicon epitaxial wafer manufactured by the method of manufacturing a silicon epitaxial wafer according to claim 1 .

6. The method of manufacturing a silicon epitaxial wafer according to claim 2 , wherein the treatment atmosphere in the oxygen precipitation nuclei dissolution process is an atmosphere of a non-oxidizing gas not containing nitrogen.

7. The method of manufacturing a silicon epitaxial wafer according to claim 2 , wherein the treatment atmosphere in the oxygen precipitation nuclei dissolution process is a mixed atmosphere of a non-oxidizing gas not containing 1% or more of nitrogen and oxygen gas.

8. A silicon epitaxial wafer manufactured by the method of manufacturing the silicon epitaxial wafer according to claim 2 .

Assignees

• Sumco Corp

Inventors

• Ono Toshiaki
• Ito Wataru
• Fujise Jun

Classifications

• H10P72/7611

  characterised by edge profile or support profile · CPC title

• H10P72/0436

  mainly by radiation · CPC title

• H10P36/20

  Intrinsic gettering, i.e. thermally inducing defects by using oxygen present in the silicon body · CPC title

• H10P36/00

  Gettering within semiconductor bodies · CPC title

• H10P14/20

  of semiconductor materials · CPC title