Methods for manufacturing a chip package

US9230894B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9230894-B2
Application numberUS-201213461859-A
CountryUS
Kind codeB2
Filing dateMay 2, 2012
Priority dateMay 2, 2012
Publication dateJan 5, 2016
Grant dateJan 5, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for manufacturing a chip package is provided. The method including: arranging a plurality of dies over a carrier; depositing encapsulation material over the carrier wherein the plurality of dies are covered by the encapsulation material thereby forming a structure including the encapsulation material and the plurality of dies; and removing encapsulation material thereby forming a thinned portion of the structure and a further portion of the structure including encapsulation material thicker than the thinned portion.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for manufacturing a chip package, the method comprising: arranging a plurality of dies over a carrier, the plurality of dies having a top and bottom side opposite thereto; arranging a plurality of electrically conductive blocks over the carrier, the plurality of blocks having a top and bottom side opposite thereto; depositing encapsulation material over the carrier wherein the plurality of dies are covered by the encapsulation material thereby forming a structure comprising the encapsulation material and the plurality of dies; removing encapsulation material opposite the carrier exposing at least a portion of the bottom side of at least one die from the plurality of dies and at least one block of the plurality of electrically conductive blocks, thereby forming a thinned portion of the structure and a further portion of the structure comprising encapsulation material thicker than the thinned portion; wherein the thinned portion forms a recess bounded by the further portion; and wherein the bottom side of the at least one die and at least one block have a substantially equal height from the carrier, further comprising depositing electrically conductive material over at least one side of the structure, wherein the electrically conductive material is thicker than the thinned portion of the structure and overlaps the thinned portion and the further portion; and wherein each of the thinned portion and the further portion comprises one or more dies. 2. The method according to claim 1 , wherein arranging the plurality of dies over the carrier comprises arranging the plurality of dies over the carrier wherein at least a portion of the plurality of dies are arranged with their front sides over the carrier. 3. The method according to claim 1 , wherein arranging the plurality of dies over the carrier comprises arranging the plurality of dies over the carrier wherein at least a portion of the plurality of dies are arranged with their backsides over the carrier. 4. The method according to claim 1 , wherein at least one die of the plurality of dies is arranged adjacent to the at least one electrically conductive block of the plurality of electrically conductive blocks. 5. The method according to claim 4 , further comprising depositing the encapsulation material wherein the plurality of electrically conductive blocks are covered by the encapsulation material, thereby forming a structure comprising the encapsulation material, the plurality of dies and the plurality of electrically conductive blocks. 6. The method according to claim 1 , further comprising releasing the structure from the carrier; and depositing an electrically insulating layer and an electrically conductive material over a side of the plurality of dies, wherein the electrically conductive material contacts at least one die from the plurality of dies. 7. The method according to claim 1 , further comprising releasing the structure from the carrier; depositing an electrically insulating layer over a side of the plurality of dies; forming one or more through-holes in the electrically insulating layer over the side of at least one die from the plurality of dies; and depositing electrically conductive material over the electrically insulating layer and in the one or more through-holes, wherein the electrically conductive material electrically contacts the at least one die. 8. The method according to claim 7 , wherein depositing electrically conductive material over the electrically insulating layer and in the one or more through-holes, wherein the electrically conductive material electrically contacts the at least one die from the plurality of dies comprises depositing electrically conductive material over the electrically insulating layer and in the one or more through-holes, wherein the electrically conductive material electrically contacts one or more electrical pads formed over the front side of the at least one die. 9. The method according to claim 7 , further comprising selectively removing one or more portions of the electrically conductive material. 10. The method according to claim 7 , wherein depositing an electrically insulating layer and an electrically conductive material over a side of the plurality of dies, wherein the electrically conductive material contacts at least one die from the plurality of dies comprises depositing an electrically insulating layer and an electrically conductive material over a side of the plurality of dies, wherein the electrically conductive material contacts at least one die from the plurality of dies and at least one electrically conductive block. 11. The method according to claim 1 , wherein depositing encapsulation material comprises depositing an encapsulation material comprising at least one material from the following group of materials, the group consisting of: filled or unfilled epoxy, pre-impregnated composite fibers, reinforced fibers, laminate, a mold material, a thermoset material, a thermoplastic material, filler particles, fiber-reinforced laminate, fiber-reinforced polymer laminate, fiber-reinforced polymer laminate with filler particles. 12. The method according to claim 1 , wherein depositing encapsulation material comprises depositing encapsulation material over one or more sidewalls of the plurality of dies and between the plurality of dies. 13. The method according to claim 4 , wherein depositing the encapsulation material comprises depositing encapsulation material between the at least one die and the at least one electrically conductive block. 14. The method according to claim 1 , wherein removing encapsulation material thereby forming a thinned portion of the structure and a further portion of the structure comprising encapsulation material thicker than the thinned portion comprises thinning the encapsulation material and a portion of the dies from a side of the structure opposite to sides of the plurality of dies arranged over the carrier. 15. The method according to claim 1 , wherein removing encapsulation material thereby forming a thinned portion of the structure and a further portion of the structure comprising encapsulation material thicker than the thinned portion comprises thinning the encapsulation material and a portion of the dies from a side of the structure opposite to sides of the plurality of dies arranged over the carrier thereby forming a thinned portion of the structure, the thinned portion of the structure having a thickness ranging from about 10 μm to about 300 μm. 16. The method according to claim 1 , wherein removing encapsulation material thereby forming a thinned portion of the structure and a further portion of the structure comprising encapsulation material thicker than the thinned portion comprises removing encapsulation material from a side of the structure using at least one of the processes from the following group of processes, the group consisting of: grinding, mechanical grinding, chemical removal, chemical etching, plasma etching, removal by laser. 17. The method according to claim 1 , wherein removing encapsulation material thereby forming a thinned portion of the structure and a further portion of the structure comprising encapsulation material thicker than the thinned portion comprises thinning the encapsulation material and the plurality of dies thereby forming a thinned cavity portion in the structure. 18. The method according to claim 1 , wherein removing encapsulation material thereby forming a thinned portion of the structure and a further portion of the structure comprising encapsulation mater

Assignees

Inventors

Classifications

  • characterised by their shape or disposition · CPC title

  • on encapsulations · CPC title

  • batch processes · CPC title

  • extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs · CPC title

  • Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps · CPC title

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What does patent US9230894B2 cover?
A method for manufacturing a chip package is provided. The method including: arranging a plurality of dies over a carrier; depositing encapsulation material over the carrier wherein the plurality of dies are covered by the encapsulation material thereby forming a structure including the encapsulation material and the plurality of dies; and removing encapsulation material thereby forming a thinn…
Who is the assignee on this patent?
Fuergut Edward, Escher-Poeppel Irmgard, Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H10W70/657. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 05 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).